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With the recent development of broadband and satellite communications, one of the main engines for the advance of modern Microelectronics is the fabrication of devices with increasing cutoff frequency and lowest possible level of noise. Even if heterojunction bipolar devices (HBTs) have reached a good frequency performance, the top end of high frequency low-noise applications is monopolized by unipolar devices, mainly HEMTs (High Electron Mobility Transistors). In particular, within the vast family of heterojunction devices, the best results ever reported in the W-band have been obtained with InP based HEMTs using the AlInAs/InGaAs material system, improving those of usual GaAs based pseudomorphic HEMTs. In field effect devices, the reduction of the gate length (Lg) up to the technological limit is the main way to achieve the maximum performances. But the design of the devices is not so simple, when reducing the gate length it is convenient to keep constant the aspect ratio (gate length over gate-to-channel distance) in order to limit short channel effects. This operation can lead to the appearance of other unwanted effects, like the depletion of the channel due to the surface potential or the tunneling of electrons from the channel to the gate. Therefore, in order to optimize the high frequency or the low-noise behavior of the devices (that usually can not be reached together) not only the gate-to-channel distance must be chosen carefully, but also many other technological parameters (both geometrical and electrical): composition of materials, width of the device, length, depth and position of the recess, thickness and doping of the different layers, etc. Historically, these parameters have been optimized by classical simulation techniques or, when such simulations are not physically applicable, by the expensive 'test and error' procedure. With the use of computer simulation, the design optimization can be made in a short time and with no money spent. However, classical modelling of electronic devices meets important difficulties when dealing with advanced transistors, mainly due to their small size, and the Monte Carlo technique appears as the only possible choice
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