Paper
3 September 2008 A hardware error estimate for floating-point computations
Tomás Lang, Javier D. Bruguera
Author Affiliations +
Abstract
We propose a hardware-computed estimate of the roundoff error in floating-point computations. The estimate is computed concurrently with the execution of the program and gives an estimation of the accuracy of the result. The intention is to have a qualitative indication when the accuracy of the result is low. We aim for a simple implementation and a negligible effect on the execution of the program. Large errors due to roundoff occur in some computations, producing inaccurate results. However, usually these large errors occur only for some values of the data, so that the result is accurate in most executions. As a consequence, the computation of an estimate of the error during execution would allow the use of algorithms that produce accurate results most of the time. In contrast, if an error estimate is not available, the solution is to perform an error analysis. However, this analysis is complex or impossible in some cases, and it produces a worst-case error bound. The proposed approach is to keep with each value an estimate of its error, which is computed when the value is produced. This error is the sum of a propagated error, due to the errors of the operands, plus the generated error due to roundoff during the operation. Since roundoff errors are signed values (when rounding to nearest is used), the computation of the error allows for compensation when errors are of different sign. However, since the error estimate is of finite precision, it suffers from similar accuracy problems as any floating-point computation. Moreover, it is not an error bound. Ideally, the estimate should be large when the error is large and small when the error is small. Since this cannot be achieved always with an inexact estimate, we aim at assuring the first property always, and the second most of the time. As a minimum, we aim to produce a qualitative indication of the error. To indicate the accuracy of the value, the most appropriate type of error is the relative error. However, this type has some anomalies that make it difficult to use. We propose a scaled absolute error, whose value is close to the relative error but does not have these anomalies. The main cost issue might be the additional storage and the narrow datapath required for the estimate computation. We evaluate our proposal and compare it with other alternatives. We conclude that the proposed approach might be beneficial.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Tomás Lang and Javier D. Bruguera "A hardware error estimate for floating-point computations", Proc. SPIE 7074, Advanced Signal Processing Algorithms, Architectures, and Implementations XVIII, 70740N (3 September 2008); https://doi.org/10.1117/12.796809
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Cited by 3 scholarly publications.
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KEYWORDS
Error analysis

Surface plasmons

Binary data

Computer science

Computer simulations

Computer architecture

Electrical engineering

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