Validation of CD-SEM etching residue evaluation technique for MuGFET structures

Miki Isawa; Maki Tanaka; Tatsuya Maeda; Kenji Watanabe; Tom Vandeweyer; Nadine Collaert; Rita Rooyackers

doi:10.1117/12.813616

23 March 2009 Validation of CD-SEM etching residue evaluation technique for MuGFET structures

Miki Isawa, Maki Tanaka, Tatsuya Maeda, Kenji Watanabe, Tom Vandeweyer, Nadine Collaert, Rita Rooyackers

Proceedings Volume 7272, Metrology, Inspection, and Process Control for Microlithography XXIII; 72720Q (2009) https://doi.org/10.1117/12.813616
Event: SPIE Advanced Lithography, 2009, San Jose, California, United States

Abstract

In the previous study, we reported on the CD measurement of multi gate field effect transistors (MuGFETs) by using CD-SEM. We focused on the etching residue at the fin-gate intersection, which causes gate length variation and affects the device performance. Therefore we proposed a technique to quantify the amount of etching residues from CD-SEM top-down images. The increment of the gate linewidth at the fin sidewall was introduced as the "residue index". In this study, to validate the residue index measurement technique, experiments were carried out. First, the actual shape of the etching residue was verified in detail by high-resolution experimental-SEM and STEM cross-sectional imaging techniques. Next, the measurement capability of CD-SEM image was confirmed by comparing with the high-resolution experimental-SEM measurement results. Finally, the proposed technique was applied to the layout dependency evaluation of the residue index, and it was confirmed that the residue index has enough sensitivity to quantify the systematic residue size variation related to fin A/R. Then, we confirmed the reliability of the proposed technique. The residue index measurement technique is expected to be useful for the evaluation of the gate etching process of the MuGFET.

Citation Download Citation

Miki Isawa, Maki Tanaka, Tatsuya Maeda, Kenji Watanabe, Tom Vandeweyer, Nadine Collaert, and Rita Rooyackers "Validation of CD-SEM etching residue evaluation technique for MuGFET structures", Proc. SPIE 7272, Metrology, Inspection, and Process Control for Microlithography XXIII, 72720Q (23 March 2009); https://doi.org/10.1117/12.813616

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available

Members: $17.00

Non-members: $21.00 ADD TO CART

PROCEEDINGS
10 PAGES

DOWNLOAD PAPER SAVE TO MY LIBRARY

GET CITATION

RIGHTS & PERMISSIONS

Get copyright permission Get copyright permission on Copyright Marketplace

KEYWORDS

Etching

Scanning transmission electron microscopy

Semiconducting wafers

Critical dimension metrology

Manufacturing

Transistors

Edge detection

Show All Keywords

Keywords/Phrases

Search In:

Publication Years