Paper
23 March 2009 Scanner matching optimization
Michiel Kupers, Patrick Klingbeil, Joerg Tschischgale, Stefan Buhl, Fritjof Hempel
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Abstract
Cost of ownership of scanners for the manufacturing of front end layers is becoming increasingly expensive. The ability to quickly switch the production of a layer to another scanner in case it is down is important. This paper presents a method to match the scanner grids in the most optimal manner so that use of front end scanners in effect becomes interchangeable. A breakdown of the various components of overlay is given and we discuss methods to optimize the matching strategy in the fab. A concern here is how to separate the scanner and process induced effects. We look at the relative contributions of intrafield and interfield errors caused by the scanner and the process. Experimental results of a method to control the scanner grid are presented and discussed. We compare the overlay results before and after optimizing the scanner grids and show that the matching penalty is reduced by 20%. We conclude with some thoughts on the need to correct the remaining matching errors.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Michiel Kupers, Patrick Klingbeil, Joerg Tschischgale, Stefan Buhl, and Fritjof Hempel "Scanner matching optimization", Proc. SPIE 7272, Metrology, Inspection, and Process Control for Microlithography XXIII, 72723B (23 March 2009); https://doi.org/10.1117/12.813668
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CITATIONS
Cited by 1 scholarly publication.
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KEYWORDS
Scanners

Semiconducting wafers

Overlay metrology

Error analysis

Feedback loops

Manufacturing

Metrology

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