Paper
23 March 2009 The study and simulation of high-order overlay control including field-by-field methodologies
Dongsub Choi, Chulseung Lee, Changjin Bang, Myoungsoo Kim, Hyosang Kang, James Manka, Seunghoon Yoon, Dohwa Lee, John C. Robinson
Author Affiliations +
Abstract
Overlay continues to be one of the key challenges for photolithography in semiconductor manufacturing. It becomes even more challenging due to the continued shrinking of the device node. The corresponding tighter overlay specs require the consideration of new paradigms for overlay control, such as high-order control schemes and/or field-by-field overlay control. These approaches have been demonstrated to provide tighter overlay control for design rule structures, and can be applied to areas such as double patterning lithography (DPL), as well as for correcting non-linear overlay deformation signatures caused by non-lithographic wafer processing. Previously we presented a study of high-order control applied to high order scanner correction, high order scanner alignment, and the sampling required to support these techniques. Here we extend this work, using sources of variation (SOV) techniques, and have further studied the impact of field by field compensation. This report will show an optimized procedure for high order control using production wafers and field by field control.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Dongsub Choi, Chulseung Lee, Changjin Bang, Myoungsoo Kim, Hyosang Kang, James Manka, Seunghoon Yoon, Dohwa Lee, and John C. Robinson "The study and simulation of high-order overlay control including field-by-field methodologies", Proc. SPIE 7272, Metrology, Inspection, and Process Control for Microlithography XXIII, 727230 (23 March 2009); https://doi.org/10.1117/12.812935
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Cited by 2 scholarly publications.
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KEYWORDS
Scanners

Semiconducting wafers

Overlay metrology

Data modeling

Lithium

Optical alignment

Optical lithography

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