For the manufacturing of semiconductor technologies following the ITRS roadmap, we will face the nodes well below 32nm half pitch in the next 2~3 years. Despite being able to achieve the required resolution, which is now possible with electron beam direct write variable shaped beam (EBDW VSB) equipment and resists, it becomes critical to precisely reproduce dense line space patterns onto a wafer. This exposed pattern must meet the targets from the layout in both dimensions (horizontally and vertically). For instance, the end of a line must be printed in its entire length to allow a later placed contact to be able to land on it. Up to now, the control of printed patterns such as line ends is achieved by a proximity effect correction (PEC) which is mostly based on a dose modulation. This investigation of the line end shortening (LES) includes multiple novel approaches, also containing an additional geometrical correction, to push the limits of the available data preparation algorithms and the measurement. The designed LES test patterns, which aim to characterize the status of LES in a quick and easy way, were exposed and measured at Fraunhofer Center Nanoelectronic Technologies (CNT) using its state of the art electron beam direct writer and CD-SEM. Simulation and exposure results with the novel LES correction algorithms applied to the test pattern and a large production like pattern in the range of our target CDs in dense line space features smaller than 40nm will be shown.© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.