Paper
4 March 2008 A comprehensive model of process variability for statistical timing optimization
Author Affiliations +
Abstract
As technologies scale, the impact of process variations to circuit performance and power consumption is increasingly significant. In order to improve the efficiency of statistical circuit optimization, a better understanding of the relationship between circuit variability and process variation is needed. Our work proposes a hierarchical variability model, which addresses both systematic and random variations at wafer, field, die, and device level, and spatial correlation artifacts are captured implicitly. Finally, layout dependent effects are incorporated as an additive component. The model is verified by applying to 90nm ring oscillator measurement data and can be used for variability prediction and optimization.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Kun Qian and Costas J. Spanos "A comprehensive model of process variability for statistical timing optimization", Proc. SPIE 6925, Design for Manufacturability through Design-Process Integration II, 69251G (4 March 2008); https://doi.org/10.1117/12.772980
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CITATIONS
Cited by 22 scholarly publications.
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KEYWORDS
Semiconducting wafers

Process modeling

Lithography

Oscillators

Instrument modeling

Statistical analysis

Optimization (mathematics)

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