Programmable inner-product enhanced associative processor array

Subhash C. Balam; Karthik Hariharakrishnan; Dan Schonfeld

doi:10.1117/12.530897

19 April 2004 Programmable inner-product enhanced associative processor array

Subhash C. Balam, Karthik Hariharakrishnan, Dan Schonfeld

Proceedings Volume 5309, Embedded Processors for Multimedia and Communications; (2004) https://doi.org/10.1117/12.530897
Event: Electronic Imaging 2004, 2004, San Jose, California, United States

Abstract

Associative Processors have become popular because of their ability to perform parallel operations in massive scale. The use of Associative Processors especially for MPEG4/H.263 video coding was found to have low power consumption. However they lack the ability to perform computationally intensive block transforms. The paper discusses requirements for video processing and shows how Associative Processors are more suited for video coding than RISC architectures. We highlight the various drawbacks of using Associative Processors for video coding and propose a new Distributed Arithmetic based enhancement to the architecture that provides greater flexibility in the implementation of video coding algorithms. These modifications help in faster computation of DCT and simulations of the proposed enhancement show that MPEG 4 simple profile encoder can be implemented in less than 10 MIPS.

Citation Download Citation

Subhash C. Balam, Karthik Hariharakrishnan, and Dan Schonfeld "Programmable inner-product enhanced associative processor array", Proc. SPIE 5309, Embedded Processors for Multimedia and Communications, (19 April 2004); https://doi.org/10.1117/12.530897

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