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Proceedings Article

Sources of line-width roughness for EUV resists

[+] Author Affiliations
Heidi B. Cao, Wang Yueh, Bryan J. Rice, Jeanette Roberts, Terence Bacuita, Manish Chandhok

Intel Corp. (USA)

Proc. SPIE 5376, Advances in Resist Technology and Processing XXI, 757 (May 14, 2004); doi:10.1117/12.536041
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From Conference Volume 5376

  • Advances in Resist Technology and Processing XXI
  • John L. Sturtevant
  • Santa Clara, CA | February 22, 2004

abstract

Resists for the next generation of lithography must be able to meet stringent line width roughness (LWR) targets. The LWR requirements, governed by device performance, are the same regardless of the lithographic technology that is chosen. Unfortunately no resist platform for any technology (EUV, 157 nm, 193 nm) is on track to meet the targets for the 45 nm and the 32 nm technology nodes. In order to understand the fundamental sources of LWR, we designed an experiment to statistically vary resist parameters for EUV resists. The results of this study show methods to improve LWR and shed light on the sources of LWR.

© (2004) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.
Citation

Heidi B. Cao ; Wang Yueh ; Bryan J. Rice ; Jeanette Roberts ; Terence Bacuita, et al.
"Sources of line-width roughness for EUV resists", Proc. SPIE 5376, Advances in Resist Technology and Processing XXI, 757 (May 14, 2004); doi:10.1117/12.536041; http://dx.doi.org/10.1117/12.536041


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