Zero-space microlenses for CMOS image sensors: optical modeling and lithographic process development

Douglas A. Baillie; Jonathan E. Gendler

doi:10.1117/12.533453

28 May 2004 Zero-space microlenses for CMOS image sensors: optical modeling and lithographic process development

Douglas A. Baillie, Jonathan E. Gendler

Proceedings Volume 5377, Optical Microlithography XVII; (2004) https://doi.org/10.1117/12.533453
Event: Microlithography 2004, 2004, Santa Clara, California, United States

Abstract

Microlens arrays are widely used on image sensor products to control incident light propagation onto an appropriate sensor, in order to increase collection efficiency and reduce optical cross-talk. Typically microlenses are formed by defining arrays of photoresist islands using standard lithographic techniques, then melting and cross-linking the resist to form stable microlens arrays. A space between the resist islands is necessary to avoid the lenses merging during melting. The minimum space is constrained by lithographic resolution. Such refractive microlens arrays are a part of Tower Semiconductor’s standard offering for CMOS Image Sensor products. In order to understand the contribution of alternative microlens fabrication processes to optical cross-talk, optical simulation techniques have been developed at Tower Semiconductor and applied to quantify the performance of microlenses in image sensors. Amongst other factors, these simulations quantify the effect of the space between microlenses. Several alternative fabrication techniques have been compared, including a process to remove the lithographic resolution constraint and form microlens arrays with arbitrary spacing between lenses.

Citation Download Citation

Douglas A. Baillie and Jonathan E. Gendler "Zero-space microlenses for CMOS image sensors: optical modeling and lithographic process development", Proc. SPIE 5377, Optical Microlithography XVII, (28 May 2004); https://doi.org/10.1117/12.533453

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