Paper
8 February 2005 The SOPC design based on Nios CPU in EPON system
Lili Zhu, Xiliang Fan
Author Affiliations +
Abstract
With the need of more and more high quality services, EPON system is widely favored by most people with its advanced technology of Gigabit and PON, which will replace the traditional techniques of copper and MC gradually. We can realize the MPCP protocol defined in IEEE802.3ah by the hardware scheme, such as FPGA or ASIC. Using SNMP protocol to achieve network management is the popular way. SNMP network manager can perform the long-distance configuration of the parameters in EPON system by sending out SET message; on the other hand, it can research the information by sending out GET message. Consequently, the Nios embedded processor acts as a transmission channel or a bridge between SNMP agent and hardware system. Now SOPC is a popular design method, which processes flexible design mode, reducible, expansible, upgradeable, and have the programmable function between hardware and software synchronously in a single chip. Integrated with the advantages of SOC, PLD, and FPGA, SOPC is provided with the following basic characteristics: an embedded processor core; on-chip high speed RAM resources with small capability; processor debug interface and FPGA programmable interface, etc. The Nios embedded processor is a soft core CPU optimized for programmable logic and SOPC (System-on-a-programmable-chip) designs, which accomplishes the data collection and configuration between SNMP agent and hardware system, the report of registration and alarm information, also the fulfillment of DBA which can be operated with all kind of algorithms. SOPC builder is a tool employed as turning out a system based on bus, thereby many components are included in this design, for instance, CPU, memory interface, peripherals interface etc. Developing applications using the Nios embedded processor is slightly different from the traditional processors, since the designer can configure the processor architecture and specify the peripheral content. That is, a designer can build a microcontroller according to system design requirement, as opposed to selecting a pre-built microcontroller with a fixed set of peripherals, on-chip memory, and external interfaces. In this paper, we introduce an EPON system by way of FPGA, and a SOPC design on the basis of Nios platform is given, in which data transmission channel and DBA functions are achieved. According to the need of EPON system, CPU, memory, and peripheral interfaces are selected from the library of SOPC builder. Once the Nios system is created, it may optionally be combined with other used-defined logic. Designer writes the source code, compiles the application software, and debugs the code to meet the need of EPON system. Keywords: EPON, Nios, SNMP, SOPC, DBA
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Lili Zhu and Xiliang Fan "The SOPC design based on Nios CPU in EPON system", Proc. SPIE 5626, Network Architectures, Management, and Applications II, (8 February 2005); https://doi.org/10.1117/12.573513
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Cited by 1 scholarly publication.
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KEYWORDS
Field programmable gate arrays

Networks

Switches

Telecommunications

Logic

Embedded systems

Fiber to the x

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