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Proceedings Article

Surface engineering for resolution enhancement in nanoimprint lithography

[+] Author Affiliations
G. Y. Jung, W. Wu, Z. Li, S. Y. Wang, R. S. Williams

Hewlett-Parkard Labs. (USA)

William M. Tong

Hewlett-Parkard Labs. (USA) and The Hewlett-Packard Co. (USA)

Proc. SPIE 5751, Emerging Lithographic Technologies IX, 952 (May 6, 2005); doi:10.1117/12.599793
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From Conference Volume 5751

  • Emerging Lithographic Technologies IX
  • R. Scott Mackay
  • San Jose, CA | February 27, 2005

abstract

Nanoimprinting lithography was initiated as an alternative way to achieve nanoscale structures with high throughput and low cost. We have developed a UV-nanoimprint process to fabricate 34x34 crossbar circuits with a half-pitch of 50 nm (equivalent to a bit density of 10 Gbit/cm2). Our resist was of a single layer, which required fewer processing steps than any bi-layer process, but yielded high quality results. By engineering the surface energy of the substrate, we also eliminated the problem of trapped air during contact with the mold due to non-conformal contact such that it spreads the resist and expels trapped air. Resist adhesion to the gaps between features in the mold during mold separation is a challenge that becomes more severe as the pitch size shrinks. We have improved the resist adhesion to the substrate by applying a monolayer of surface linker molecule on the substrate surface. The surface linker bonded the resist to the substrate surface chemically and produced fine imprinted patterns at 30 nm hp.

© (2005) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.
Citation

G. Y. Jung ; W. Wu ; Z. Li ; S. Y. Wang ; William M. Tong, et al.
"Surface engineering for resolution enhancement in nanoimprint lithography", Proc. SPIE 5751, Emerging Lithographic Technologies IX, 952 (May 6, 2005); doi:10.1117/12.599793; http://dx.doi.org/10.1117/12.599793


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