Low-noise custom VLSI for CdZnTe pixel detectors

Walter R. Cook III; Jill A. Burnham; Fiona A. Harrison

doi:10.1117/12.330328

10 November 1998 Low-noise custom VLSI for CdZnTe pixel detectors

Walter R. Cook III, Jill A. Burnham, Fiona A. Harrison

Proceedings Volume 3445, EUV, X-Ray, and Gamma-Ray Instrumentation for Astronomy IX; (1998) https://doi.org/10.1117/12.330328
Event: SPIE's International Symposium on Optical Science, Engineering, and Instrumentation, 1998, San Diego, CA, United States

Abstract

A custom analog VLSI chip is being developed for the readout of pixelated CdZnTe detectors in the focal plane of an astronomical hard x-ray telescope. The chip is intended for indium bump bonding to a pixel detector having pitch near 0.5 mm. A complete precision analog signal processing chain, including charge sensitive preamplifier, shaping amplifiers and peak detect and hold circuit, is provided for each pixel. Here we describe the circuitry and discus the performance of a functional prototype fabricated in a 1.2 micrometers CMOS process at Orbit Semiconductor. Dynamic performance is found to be close to SPICE model predictions over a self-triggering range extending from 1 to 50 keV. Integral non-linearity and noise while acceptable ar not as god as predicted. Power consumption is only 250 uW per pixel. Layout and design techniques are discussed which permit successful self-triggering operation at the low 1 keV threshold.

Citation Download Citation

Walter R. Cook III, Jill A. Burnham, and Fiona A. Harrison "Low-noise custom VLSI for CdZnTe pixel detectors", Proc. SPIE 3445, EUV, X-Ray, and Gamma-Ray Instrumentation for Astronomy IX, (10 November 1998); https://doi.org/10.1117/12.330328

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