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Proceedings Article

PN and SOI wafer flow process for stencil mask fabrication

[+] Author Affiliations
Joerg Butschke, Mathias Irmscher, Florian Letzkus, Carsten Reuter, Reinhard Springer

Institut fuer Mikroelektronik/Stuttgart (Germany)

Albrecht Ehrmann, Rainer Kaesmaier, Karl Kragler

Siemens AG (Germany)

Ernst Haugeneder, Hans Loeschner

Ionen Mikrofabrikations Systeme GmbH (Austria)

Josef Mathuni

Siemans AG (Germany)

Ivo W. Rangelow, Feng Shi

Univ. Kassel (Germany)

Proc. SPIE 3665, 15th European Conference on Mask Technology for Integrated Circuits and Microcomponents '98, 20 (April 23, 1999); doi:10.1117/12.346224
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From Conference Volume 3665

  • 15th European Conference on Mask Technology for Integrated Circuits and Microcomponents '98
  • Munich, Germany | November 16, 1998

abstract

Two process flows for the fabrication of stencil masks have been developed. The PN Wafer Flow- and the SOI Wafer Flow Process. Membranes and stencil masks out of different 6 inch Si base wafers with 3 micrometers membrane thickness and a membrane diameter between 120 mm and 126 mm were fabricated. The membrane stress depending on the material property and doping level has been determined. First metrology measurements have been carried out.

© (1999) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.
Citation

Joerg Butschke ; Albrecht Ehrmann ; Ernst Haugeneder ; Mathias Irmscher ; Rainer Kaesmaier, et al.
"PN and SOI wafer flow process for stencil mask fabrication", Proc. SPIE 3665, 15th European Conference on Mask Technology for Integrated Circuits and Microcomponents '98, 20 (April 23, 1999); doi:10.1117/12.346224; http://dx.doi.org/10.1117/12.346224


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