It is shown that today one of the priority directions of development of the electronic industry both abroad and in our country is the creation of silicon semiconductor devices and ICs with submicron topological norms, capable of functioning at temperatures of 200 °C and above. It is noted that although in modern ICs aluminum (with additions of silicon and copper) and copper are used as the interconnect material, recently researchers have shown interest in using tungsten as an interconnect material, which is characterized by high electromigration resistance. In the study of the mechanical properties of alloys W with Re, Ti, N films it was found that they are characterized by a reduced level of mechanical stresses compared with the built-in mechanical stresses in the W – Si structure. It was revealed that the alloy films have satisfactory adhesion to silicon and silicon oxide. Tungsten and its alloys films deposited on silicon from the point of view of their use as interconnects in high-temperature silicon ICs, confirmed the prospects for use in VLSI based on a comparative analysis of electrophysical and mechanical characteristics.
The paper presents the results of studying the process of deposition of a Ti-TiN layer coating in a trenches in a silicon substrate. It is shown that one of the promising methods for the deposition of organometallic compounds from the gas phase is MOCVD, characterized by an increased conformity of the film deposition of on a relief surface. The data showing the high-quality filling of trenches in silicon with two-layer Ti-TiN coating are presented.
The work is devoted to the study of the formation of zinc oxide films in four different ways: by magnetron sputtering, deposition from the gas phase, by dip-coating, and by atomic layer deposition. The effect of alloying additives of subsequent thermal annealing on the morphology and electrical conductivity of the films obtained is reflected. It has been established that the smallest roughness of films is obtained when films are deposited by atomic layer deposition.
In this work experimental research results of silicon deep plasma etching features during 3D-TSV structure producing in inductively coupled plasma are presented. Silicon etching operational parameters influence (inductor RF power, working gas consumption) on process technological characteristics (Si etching rate, selectivity and etching profile) is investigated. Wherein passivation stage’s operational parameters were not changed and were constant. It is shown that microroughness in the form of microneedles and column structures can be formed on the bottom of formed structures at low RF power values; full stop of Si etching process can be also possible. It has been revealed that during polymerization stage fluorocarbon film’s deposition rate increase is observed on structure’s inclined surface in comparison with film’s deposition rate on vertical surfaces. At the same time fluorocarbon film’s deposition rate on the bottom of trench is higher than in inclined surface of the structure. Silicon surface after deep plasma etching process is studied. Fluorocarbon film’s adhesion to silicon and silicon oxide ability is researched. It is demonstrated that adhesion on test samples has small values or missing.
This paper presents the results of comparative analysis of the electrical and mechanical characteristics of the tungsten and tungsten alloyed with rhenium films deposited on silicon, from the point of view of their use as interconnects in silicon ICs. W and W (Re-5%) alloyed with rhenium films were made by magnetron deposition. Sheet resistivity for W and W (Re- 5%) was 13 and 27 μOhm·cm respectively. Elemental composition the formed films was examined by Auger spectroscopy. To investigate the electromigration resistance of the conductors a methodology based on the accelerated electromigration testing at constant temperature was used. A comparative analysis of the mechanical stresses carried out in the W and W(Re - 5%) films. For this purpose was applied non-destructive method for optical laser scanning. At the same time, these films explored their ability of adhesion to silicon and silicon oxide. It is shown that the pull force of the W(Re - 5%) films was ~1500 G/mm2, of the W films ~ 700 G/mm2
The article dwells upon theoretical considerations on the nature of probe local anodic oxidation. The concept of the process presented here allows for the device intrinsic amperage limitations in the tip-sample system. The work also demonstrates characteristics of height-modulated dielectric mask formation on the solid-state surfaces.
A copper sulfide and bismuth sulfide thin films were deposited on Si/Ti substrate by successive ionic layer adsorption and reaction method at room temperature, using cupric chloride, bismuth chloride, complexing Na2EDTA and sodium sulfide aqueous solutions as precursors. The surface morphology, structural and electrical properties of the as-deposited films were investigated by scanning electron and atomic force microscopy, energy dispersive X-ray analysis (EDS), and 2-point probe methods. The films were found to be amorphous, rough with thickness 30 nm and 20 nm for CuSx and BiSx, respectively. Average atomic percentage of Cu:S and Bi:S in the as-deposited films was calculated as 1:1.5 and 2.3:3. It was noted that films possess resistive switching behavior. Ionic conductivity of the CuSx film was found to be 25,8·10-3 Ohm-1·cm-1 . Ionic conductivity of the BiSx film was found to be 16·10-3 Ohm-1·cm-1. Set voltages UON defined by I-V curves were found to be in the range 0,75-0,8 V/cm for both films. Reset voltages UOFF were found to be in the range 0,6-0,7 V/cm for both films. Thus, formed films can be used as active layers for memory devices application.
This work is focused on investigation of the tips sharpening process with the use of defocused ion beam. The group of cantilevers was placed on silicon substrate. It was established that the method enables the simultaneous sharpening of silicon cantilevers tips placed on 200-mm diameter Si substrates. The current work provides information about efficiency of the modified cantilevers.
We propose approach for modeling thin aluminum film anodization in three dimensions using variation of coupled lattice map on volumetric grid, which is capable of capturing porous and nonporous aluminum oxide growth and electrochemical polishing modes. Model derivation is based on Parkhutik and Shershulsky understandings. Numerical simulation results for various initial conditions are shown and compared to experimental data.
The influence of the thermal regimes on the formation of ordered porous anodic alumina was investigated. The process of the formation of the high ordered films of porous anodic alumina was developed.
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