Electron-beam tools have been an important part of the semiconductor industry since its beginnings especially in the area of metrology and are a major contributor towards the goals of process control and yield enhancement. However, in order to stay on the Moore's Law curve instrument performance must be improved by a factor of two every two or three years and with the proximity of fundamental physical limits such major improvements in performance become increasingly difficult to obtain. This paper examines the opportunities that exist for continued improvement, and considers what other options are available for tools to replace the CD-SEM and its associates.

The production of 70nm devices is projected for the year 2008. With this projection, optical lithography will become more challenging since as the device size goes down, the potential for introducing killer defects also increases dramatically. Wafer inspection will play a key role in controlling the defect mechanisms and keeping an acceptable yield for next generation VLSI manufacturing. Metrology tools for the new generation lithography will have the following features. First, the projection and collection lenses will have higher numerical apertures (NA) to obtain high-resolution images. Typically, the NA will be as high as 0.9. Second, the wavelength used for wafer inspection will be much smaller so that common wafer materials will become highly absorptive. Last, with the increased number of process steps, wafer inspection will need to provide information for more critical processes. Based on these features, accurate modeling of the next generation wafer inspection schemes is needed to aid in the characterization and optimization of the inspection tools. The simulation tool must be able to simulate inspection systems with high NA lens, DUV wavelengths, and highly absorptive wafer materials accurately and quickly. At Carnegie Mellon University, a simulator called METRO-3D was developed into a defect inspection simulator for DUV lithography processes. This simulator is able to successfully model various types of defect mechanisms. However, it has experienced occasional numerical instabilities, with discontinuous dielectric structures composed of highly absorptive materials. In order to provide a tool to simulate the wafer inspection scheme of SUB-70NM NODE LITHOGRAPHY, we have incorporated a new algorithm to model the wafer inspection system more accurately and robustly. Numerical experiments shows that the algorithm is capable of simulating topographies with discontinuous dielectric functions, yielding stable results even when the material is highly absorptive. To verify the accuracy of the simulator, several simulations were compared with both analytical models and results form other existing simulators. The results show good matches between METRO-3D and these well-established results. Finally, we performed simulations on industrial data and the results exemplified the ability of METRO-3D to model complex 3-D structures. In this paper we will present is efficient and stable EM solver and the results of the simulator applied to various sub-70nm node wafer inspection schemes.

In this paper the simulation of wafer images for Attenuated Phase Shift Masks (ATTPSM) and repaired binary masks are performed by Virtual Stepper System in a real production environment. In addition, the Automatic Defect Severity Scoring module in Virtual Stepper is also used to calculate the defect severity score for each defect. ADSS provides an overall score that quantifies the impact of a given defect on the surrounding features. For the binary masks, the quality of reported defects is studied. For the ATTPSM three types of programmed defects on both line/space and contact hole patterns are assessed. Wafer exposures are performed using 248 nm imaging technology and inspection images generated on a KLA-Tencor's SLF27 system. These images are used by the Virtual Stepper System to simulate wafer images under the specific stepper parameters. The result are compared to SEM images of resist patterns and Aerial Image Measurement System simulated results.

Many techniques are used to reduce k1 for the 90nm node, including phase shift masks (PSM), assist features and optical proximity correction (OPC) features. Today, in addition to CD line widths, critical measurements of assist features, contact areas, and corner rounding, are now required to verify reticle integrity. New algorithms have been developed and implemented on the KMS100 DUV optical metrology tool to correct for iso/dense bias (optical proximity correction), assess corner rounding effects, and verify contact fidelity and printability. This paper presents new CD metrology studies for Chrome-on-Glass (COG) performed on a KMS100 DUV optical tool using these new metrology algorithms.

Driven by Moore's Law, the quest to double the number of transistors on a given chip every 18-24 months, the density and complexity of patterns on photomasks has increased steadily and significantly. To maintain the fidelity of shrinking features, reticle enhancement techniques such as OPC (Optical Proximity Correction) and Phase Shift Masks are now widely used in optical lithography to extend the lifetime of the existing technology. These techniques (or advanced reticles) provide the desired improvements in spatial resolution, but also complicate the task of reticle defect inspection. In this paper, we present results from ongoing contamination inspections of Embedded (Attenuated) Phase Shift Masks (EPSMs) for 248nm and 193nm lithography. A variety of 248nm masks have been successfully inspected on the KLA-Tencor STARlightTM SL3UV and SL3 tools at Intel Mask Operations (IMO) in Santa Clara, CA. Lessons learned from inspection of 248nm masks are being applied towards inspection of 193nm masks. A representative sample of inspection parameters such as algorithm options, and corresponding inspection results (defect types, capture rates etc.) are presented and discussed in the paper.

Carbon nanotubes (CNT) are among the candidates for atomic force microscopy probes for use in high aspect ratio critical dimension metrology (CDM). Their mechanical strength at small diameters makes them ideal probes for narrow and deep features. The synthesis of CNT has been making great progress in recent years. The use of CNT in scanning probe microscopy, however, has been limited due to a number of problems. While the CNT probes generally appear to be long lasting, the manufacture of precisely aligned CNT of defined length, diameter and number of walls poses a number of challenges. Yet, such precisely defined CNT probes seem to be required if the cantilevers are to be used for CDM. Our result demonstrate, for example, that the attachment angle of CNT with respect to the cantilever beam is crucial for their application in CDM. We report about our efforts to overcome these problems by growing well-defined CNT on standard Si cantilevers using chemical vapor deposition in combination with focused ion-beam machining techniques.

The continental scaling down of CMOS feature size to 100 nm and below necessitates a characterization technique to resolve high aspect ratio features in the nanoscale regime. This paper reports the use of atomic force microscopy coupled with high aspect ratio multi-walled carbon nanotube scanning probe tip for the purpose of imaging surface profile of photoresists. Multi-walled carbon-nanotube scanning probe tip for the purpose of imaging surface profile of photoresists. Multi-walled carbon-nanotube tips used in this work are 5-10 nm in diameter and about a micron long. Their exceptional mechanical strength and ability to reversibly buckle enable resolution of steep, deep nanometer-scale features. Images of photoresist patterns generated by 257 nm interference lithography as well as 193 nm lithography are presented to demonstrate multi-walled carbon nanotube scanning probe tip for applications in metrology.

We have constructed a prototype calorimeter that will serve as a primary standard for measurements of 157 nm excimer laser power and energy. The construction and performance of the prototype will be discussed. In addition, we have performed a series of thermal characterization measurements on the prototype. From these measurements, we deduce that the uncertainty in the prototype's electrical calibration factor is less than 0.2 percent. This number is less than or comparable to the uncertainty of the NIST primary standards for use with 193 and 248 nm excimer lasers. The 157 nm standards are part of a beamsplitter-based measurement system for laser power and energy calibrations. To control and determine the ambient measurement conditions, we have constructed a nitrogen-purged enclosure for this system. We are able to achieve O2 concentrations of less than 3 parts per million (ppm) inside the enclosure.

Acintic measurements of optical transmission are critical for determining the quality of repairs on advanced ArF- generation photomasks. We describe a new 193 nm tool designed to provide mask makers and uses the capability to resolve and measure photomask features with dimensions less than 0.20 micron. Measurements of transmission with sub-1 percent error are achieved in 30 seconds by using a laser probe beam imaged onto the top of the mask surface. We present high-resolution actinic images of embedded attenuator phase shift masks and of binary masks and discuss various methods and results of measuring mask transmission. A scheme to add phase retardation measurement capability to the tool is described, and preliminary results are discussed.

A Caliper CD-AFM under development at Xidex uses dual atomic force microscope (AFM) probes that operate together as a caliper for accessing vertical and highly reentrant sidewalls of high aspect-ratio features. This virtually eliminates the ubiquitous effect of probe width, which has been a large component of uncertainty in optical, scanning electron microscope (SEM), and scanning probe microscopy (SPM) linewidth measurements for decades. The resulting tool architecture eliminates the main model-dependent uncertainties associated with nanometer-scale length measurements. By drastically reducing the magnitude, complexity, and variability of model dependence, the tool is made more robust and easier to calibrate. We have already demonstrated the functionality of a single tilted probe. Future developments include dual tilted probes that scan in coordinated fashion.

As photolithography platforms move from 248nm to 193nm resist systems, the industry's established dimension measurement technique (CD-SEM) causes significant shrinkage of the resist structures during measurement. Many studies have been done to characterize this effect and look for the factors that influence / reduce this shrinkage. While numerous anecdotal mechanisms have been proposed to explain the shrinkage, few theoretical / empirical equations have been proposed to connect the observed effects to fundamental mechanisms. Models are proposed relating physical properties (accelerating voltage, photoresist density, resist e-beam film shrinkage) to the commonly observed CD 'hammer test' shrinkage profiles. The validity of the model assumptions is tested via Monte Carlo simulations, FTIR, e-beam curing, SPM and ellipsometry. These models explain the shape of the CD response to repeated measurements (exponential decay curve) and the magnitude of the shrinkage. These models also offer insight into why lower accelerating voltages cause reduced CD shrinkage, although the models predict that accelerating voltage should be a much more dominant parameter for CD shrinkage than literature has shown to date. Mass loss and density changes were also characterized during e-beam cure to check the validity of the model assumptions.

The Advanced Metrology Advisory Group (AMAG) is a council composed of the chief CD-metrologists from the International SEMATECH consortium's Member Companies and from the National Institute of Standards (NIST). The AMAG wrote and, in 2000, updated the 'Unified Advanced CD-SEM Specification for Sub- 0.18 micrometers Technology to be a living document which outlines the required performance of advanced CD-SEMs for vendor compliance to the International Technology Roadmap for Semiconductors, and also conveys other Member companies' collective needs to vendors. Following this specification, a benchmarking effort of the four currently available advanced CD-SEMs has been performed. This paper presents the result of this effort. Previous studies under this same project have ben published.

Prototype linewidth reference materials with Critical Dimensions (CDs) as narrow as 70 nm have been patterned in silicon-on-insulator films. The sidewalls of the reference features are parallel, normal to the substrate surface, and have almost atomically smooth surfaces. Linewidth calibration begins with the measurement of the electrical CDs of multiple reference features located at a selection of die sites on a wafer. The absolute widths of the cross sections of a sub-set of reference features on several chips that are diced from the wafer are then subjected to high resolution transmission electron microscopy (HRTEM) imaging to determine their physical CDs by lattice-plane counting. Sample preparation for lattice-plane counting by HRTEM Is destructive, and other reference features on the same chip become unusable for reference-material purposes. However, a calibration curve for converting the measured electrical CDs of reference features on other chips on the wafer, known as 'product reference features', to their physical values is obtained. The uncertainty attributed to the physical CD values of the product reference features generally varies inversely with the linear correlation between the cross- section lattice-plane counts and the corresponding electrical CD measurements of the sub-set of reference features that were selected for HRTEM imaging. A linear correlation value of approximately 0.97 has been obtained from a sub-set of 12 HRTEM measurements. In this case, the uncertainty attributed to the physical CD values of the product reference features is believed to be responsible for most of the product reference feature uncertainty. However, it has now been found that a forming-gas annealing treatment appears to prevent the referenced time dependence and thus has the potential for reducing the uncertainty level.

As critical-dimension shrink below 0.18 micrometers , the SPC (Statistical Process Control) based CD (Critical Dimension) control in lithography process becomes more difficult. Increasing requirements of a shrinking process window have called on the need for more accurate decision of process window center. However in practical fabrication, we found that top-down CD-SEM showed its limitations in process window center determination, especially for the best focus. For instance, in some extreme focus situation, resist pattern will show a severe undercutting profile which will affect the DICD reading by top-down CD-SEM with fixed measurement algorithm. This kind of DICD measurement error will finally affect the process window center determination (especially best focus) and in-line DICD monitoring, which will lead to the cost of scrap and loss of time for trouble-shooting. In this paper, we will present a detailed study of DICD best focus determination in case of top-down DICD by experiment and simulation. Further a possible solution to this problem will be described in the latter part of this paper.

One goal of CD metrology is to monitor lithographic process control and how it relates to post-etch results. At present, in-fab process control for this purpose is achieved through top-done CD measurements. To acquire profile information requires destructive cross-section SEM measurements or time- consuming atomic force microscope (AFM) measurements. To find height and profile information about a resist or etched structure directly on a CD-SEM, new techniques using the combination of in-column beam tilt and stereo graphic imaging have been developed and implemented on the Applied Materials VeraSEM-3D.

Optical scatterometry has been proven to be a useful tool for the inspection and assessment of lithographic processes. The characteristic signature of the scattergram provides information about the surface relief profile and can be rapidly and non-invasively acquired. Currently, attention is being focused on the inversion of scatterometric data to determine the surface profile of the relief structure. To overcome the highly non-linear relationship between the properties of the diffracting structure and the diffraction measurements, we present a linearized solution based on a least-squared refinement method. This approach relies on the reliability of lithographic processes, which allows us to determine the departures of structural key parameters from a set of expected design values. This linearized inversion, as shown by the mathematical formalism, is independent of the scatterometric measurement configuration. Hence it can be applied whether, for example, the incident angle or wavelength of the light is varied to acquire either irradiance of phase information. This is validated in this paper by various examples handling the retrieval of three geometrical parameters (groove depth, line width, and sidewall angle) from reflectance data simulated using the rigorous coupled-wave theory (RCWT) for both angular and wavelength scans. An additional benefit of the proposed linearized solution is the ability to examine mathematically the significance of measurement errors. An analytical propagation of error is presented, connecting measurement noise to the soughed parameter precisions and uncertainties. We applied this formalism to the cases mentioned above, where we simulated the retrieval of three parameters from measurements containing various levels of noise. This studies allows us to draw preliminary conclusions on the sensitivity of scatterometry with respect to the number and types of structural parameters to be retrieved, but also to the technique employed to gather the measurements.

We have studied the ability of ellipsometric spectroscopy to determine slight feature shape variations. In this paper, we show that an optical technique can be a sensitive technique to detect slight profile variations, especially at the top of the features. Simulated results as well as experimental results are presented. A sensitivity metrics, that is better suited to ellipsometric measurements than the conventional mean square error, is proposed. It is used to quantify the sensitivity to measure the feature shape of interest and to examine preferable experimental set-up. Computer simulations and ellipsometry signal libraries have been generated using a common rigorous electromagnetic modal approach (MMFE, Modal Method by Fourier Expansion). Experimental verification has been performed on resist features fabricated using DUV lithography. The ability and sensitivity to measure overhanging profiles such as notched polysilicon gates that are impossible to measure using top-down SEM is also mentioned.

Scatterometry is anew optical technique for profile measurement, capable of providing 2 or 3 dimensional profile information. The scatterometry optical system can be made small and economic enough to enable integration into each production tool and is therefore ideally suited for integrated process control. In addition, the range of applications for which this method applicable is wide: lithography photoresist profiles, etch structures, and even measurements of transparent layer thickness above arrays after CVD or CMP steps. Scatterometry is base don the measurement of the optical diffraction characteristics of aperiodic structure. Interpretation is done by evaluating the expected spectrum for a given profile, comparing the result to the measurement, and continuously fitting the profile parameters until a best fit is achieved. The leading physical model used in scatterometry is the Rigorous Coupled-Wave Analysis (RCWA). It is based on dissecting the profile into several layers and treating each as a waveguide with a fixed cross-section. The accuracy of the model is determined by the resolution of the dissection, and the number of Fourier modes retained in the calculation. RCWA gives very accurate results provided sufficient number of modes and layers are used. As calculation time scales linearly with number of layers and roughly cubic with number of modes, this usually leads to long calculation time, thus inhibiting real time interpretation which is especially required for integrated metrology. One possible solution is to consider alternative physical models to replace RCWA, such as Green's Function Integral Formulation. The selection between calculation methods should be determined by the calculation time per given spectrum accuracy. The latter should be determined for each application, considering the required parameters to be measured. In this paper we examine the use of two different models for several applications, which will be briefly described. It will be shown that is some important applications use of GFI may be preferable for real time calculations relative to RCWA.

A systematic study has been conducted to evaluate accuracy and precision of spectral scatterometry used for two-dimensional (2D) characterization of trenches formed in fluorinated silicon glass (FSG). Experiments were done on short-flow dual-damascene Cu interconnect material. Trench critical dimensions (CD) obtained using KLA-Tencor's spectral scatterometer were correlated with data collected using CD atomic force microscope (AFM), CD scanning electron microscope (SEM) and transmission electron microscope (TEM). 3 major trench characteristics were analyzed: trench width, trench depth and sidewall angle. Spectral scatterometry demonstrated an excellent correlation (above 0.96) with CD AFM and SEM in tested trench width range of (80-240) nm and trench depth range of (410-450) nm. Spectral scatterometry showed acceptable correlation of 0.55 and minimal offset of 0.05 degrees with AFM in tested sidewall angle range of (87.5-89) degrees. Spectral scatterometry has demonstrated better than 1.0 nm and 0.2 degrees dynamic precision (3s) for both width and height and sidewall angle, respectively. We conclude that KLA-Tencor's SpectraCD system is capable of accurate and precise 2D characterization of FSG trenches. We recommend scatterometry as a high throughput and non-destructive metrology for trench linewidth and depth monitoring in low-K dielectric interconnect manufacturing.

Scatterometry is gaining acceptance as a technique for critical dimension (CD) metrology that complements the more established scanning electron microscopy (SEM) techniques. Scatterometry determines the dimensions of the submicron structures by inverse diffraction calculations. SEM and scatterometry are complementary in many respects. Therefore, they are likely to coexist in the foreseeable future. Scatterometry and CD-SEM instruments can be integrated to take advantage of the complementary nature of the two techniques. To explore the joint use of scatterometry and SEM measurements, we measured a set of photoresist grating samples with CDs ranging from 240 nm through 40 nm by scatterometer (Sensys CD-i) and cross-section SEM (Hitachi S-4700). Although a cross-section SEM was used as an absolute standard for comparison of profiles and CDs, our conclusions range to include CD-SEM techniques. It was found that for measurements of profiles that were patterned with high uniformity within the measurement area, scatterometry was very effective, and correlated best with SEM measurements. However, in cases of substantial line-to-line profile variations, or for isolated or non-periodic lines, SEM is the more appropriate measurement method.

Pattern distortion caused by resist heating can be a significant contributor to errors in feature size and pattern placement. The Green's function method is suitable for determining the temperature evolution during resist exposure, but the previous published solutions are based on different simplifications and lead to different results. In this paper we present a solution of the multi-layer Green's function with clearer physical meaning. This model takes into account the thermal diffusion in all layers of resist chromium and substrate and can be used to calculate the four-dimensional temperature profiles that exist during and after electron beam exposure. Different writing strategies can cause differing degrees of edge displacement and this can lead to errors in feature size and feature position and to edge roughness.

Conventional optical development rate measurement techniques are generally unsuitable for monitoring the dissolution very tin resist films. Monochromatic systems have inadequate thickness resolution to capture the details of surface and standing wave effects, while traditional polychromatic techniques are generally unable to measure thicknesses below 250 nm. The failure of polychromatic analysis methods occurs when there is an absence of turning points int eh relative reflection spectrum. The exact thickness at which this happens is a function of the wavelength range utilized and the resist material's optical characteristics. A novel measurement method is introduced which allows a polychromatic DRM system to measure any resist thickness. Rather than placing the film under analysis directly on a reflecting substrate, it is spun on a wafer that has a relatively thick transparent film on its surface. The transparent film induces turning points in the relative reflection spectrum. The position of these turning points is modified by the presence of thin resist films in a predictable way, allowing accurate measurement of the resist film, providing the optical and thickness details of the intermediate film are known. Experimental results are presented demonstrating the capability of the technique to measure the dissolution rates of films with initial thickness ranging from 56 nm to 4400 nm. The ability of the method to resolve fine dissolution detail, such as standing waves and surface effects is also presented.

As geometrical dimensions of semiconductor devices decrease, the need to introduce Cu processes into the fabrication cycle becomes increasingly important as a means of maintaining line resistances and circuit time constants. However, the success of implementing such as fabrication process is dependent on the ability to characterize it through quantitative means, such as Overlay metrology. In this paper we examine the overlay measurement results which have been obtained on a Cu based CMOS process at the 0.12 (Mu) m technology node. Overlay measurements were taken over a wide range of process conditions, and included wafers exhibiting extreme image contrast reversal, grainy conditions and low contrast. These factors have traditionally led to a decreased ability to make repeatable measurements, if the measurements could be made at all. Our results cover the important metrics of overlay metrology, and include precision, recipe portability, and measurement success rates. The results suggest that the overlay metrology issues encountered with such leading edge processes need not pose intractable barriers to obtaining reliable overlay metrology data.

The measurement of optical constants for materials intended for use at wavelengths less than 200 nm is critical for production monitoring and process control when manufacturing devices with features of 0.15 micrometers or smaller. The challenges of organic ARC film measurement at 193 nm are due to the more complicated optical spectral signatures of the organic films and the necessary signal to noise improvements in the ultraviolet. Sharp features in the spectra of the organic ARC films are used to control the extinction value of the films, and they complicate the analysis of the optical constants. Research grade instruments available have shown the ability to accurately measure these films at 193 nm. We report here the results of using next generation optical metrology equipment to measure the optical constants on these difficult organic ARC films on a production level. Specific examples of production level monitoring of the optical constants of these films will be presented.

Conventional overlay control minimizes the registration error between aligned level pairs. Post alignment corrections are applied to the adjustable parameters on the exposure tool. These can be grouped into grid terms relating to stepper stage control and field terms related to mask, stage and lens control. To minimize alignment time and alignment mark real estate on the wafer, common practice is to align at a fixed field location over a sufficient number of fields to represent the grid. A problem with conventional overlay control is that it places no constraint on the magnitude of field terms at first-level or any subsequent level; it requires only that they be matched between the alignment pairs. Incorporation of field-stitching overlay control within each level establishes the constraint that field terms remain consistent with the wafer stage stepping at each process level. A novel target layout and analysis method enables the simultaneous determination of both conventional overlay and neighboring-field error. Application of our method at first level and subsequent alignment levels precludes the random walk of field terms, thereby improving the consistency of field matching. The net result is an improvement in overlay control, particularly in cases where 'single-point' alignment or mixed tool set matching is required.

The Overlay Metrology Advisory Group (OMAG), which includes representatives from International SEMATECH Member Companies and the National Institute of Standards and Technology, has collaborated to create a unified specification for overlay measurement tools [1]. The methodology and results of an overlay benchmarking comparison of several tools are discussed in this paper. As device technologies shrink below the sub-130nm range, a critical need arises to develop more precise tools to measure overlay. Overlay metrology capability needs to be available for detecting and controlling total device overlay regardless of the source of error. The misregistration measurement uncertainty introduced by the overlay tool can be compared for several systems. A benchmarking study is currently underway and focuses on the existing technique of optical measurement of centerline offsets in different target designs. The critical parameters that the study analyzes include precision, accuracy, throughput, through focus measurements, and recipe portability. Imaging issues such as low contrast targets, across wafer thickness variation, CMP effects, and grainy metal targets can contribute greatly to overlay errors. Several process stacks were designed to incorporate some of these imaging issues and test the limitations of the overlay tools. The same set of wafers and test locations were measured at each supplier site and the results were analyzed. This paper focuses on the methodology used for overlay benchmarking and examples of the results generated with respect to the parameters tested.

While overlay precision has received much focus in the past, overlay accuracy has become more significant with shrinking process budgets. One component of accuracy is the difference between pre-etch (DI) and post-etch (FI) overlay, which is a function of wafer processing parameters. We investigated a specific case of overlay between metal and contact layers of a 0.16 mm SRAM process. This layer was chosen because a significant amount of wafer contraction was observed between DI and FI, resulting in as much as 30nm of DI-FI overlay difference. The purpose of the study was to characterize the systematic DI-FI differences and gain understanding of the wafer processing parameters that affect the DI-FI differences. A designed experiment showed how certain overlay mark widths were less sensitive to processing parameters. AFM profiles of the prior-level overlay marks identified issues with mark widths 1.0um or smaller. By performing localized etches on the inner vs. outer marks of the overlay targets, it was noted that the majority of the wafer contraction was induced by etching the outer (prior level) mark. Production measurements at photo and etch showed the wafer contraction to be fairly stable over a month timeframe and independent of device and exposure tool, though large fluctuation shifts in wafer contraction were noted over a nine-month period. The methods used in this study can be helpful in understanding other DI-FI processing issues.

As the increasing demand of thinner CD for higher IC density and faster signal response, the techniques, such as OPC, PSM, and OAI was introduced to extend the optical resolution-limit below sub-100-nano. The lens quality is more important as critical dimension (CD) becomes smaller even using scanner instead of stepper. Pattern displacement error (PDE) resulting from lens aberration will be a phenomenon worthy to emphasize when technology design rules reaches sub-quarter micron generation and beyond1, 2. Because of inevitable coma aberration of lens, conventional 2úgm bar-in-bar overlay pattern cannot accurately represent real displacement of fine patterns in device. In this paper, evaluation of overlay pattern displacement with respect to lens coma aberration and its dependence on different feature size and structure are carried out. Different generation technology should combine with overlay pattern of proper feature size. Several illumination methodologies and NA/Sigma setting are also discussed in this paper.

An evaluation of the ASML ATHENA alignment system was performed using marks placed in the scribeline of an Intel test chip used for 130 nm node processing. Exposures were performed using two ASML scanners at IMEC at the isolation, gate, contact and first metal layers, with extreme process splits performed at Intel at critical steps in between. The splits were arranged as factorials in order to evaluate the process sensitivity of the alignment system. The modeled overlay terms with the largest sensitivities are discussed. In addition, data taken by the scanners on various mark/recipe combinations is analyzed to provide insight into overlay optimization and potential alignment system limitations.

In order to control and minimize overlay metrology errors, we have to deal with a number of design parameters both in the metrology tool domain and in the overlay target domain. For enhancing the rate of performance improvement vs. technology investment, simulation can be used for modeling both the effects of overlay metrology tool behavior and the impact of target designs on the ultimate metrology performance.

Optical scatterometry has attracted a great deal of interest for linewidth measurement due to its high repeatability and capability of measuring sidewall shape. We have developed an analogous and complementary technique for the scanning electron microscope. The new method, like scatterometry, measures shape parameters (e.g., wall angles) as well as feature widths. Also like scatterometry, it operates by finding a match between the measured signal from an unknown sample and a library of signals calculated for known samples. A physics-based model of the measurement is employed for the calculation of libraries. The method differs from scatterometry in that the signal is an image rather than a scattering pattern, and the probe particles are electrons rather than photons. Because the electron-sample interaction is more highly localized, isolated structures or individual structures within an array can be measured. Results of this technique were compared to an SEM cross section for an isolated polycrystalline silicon line. The agreement was better than 2 nm for the width and 0.2{degrees} for wall angles, differences that can be accounted for by measurement errors arising from line edge roughness.

The in-line and at-line measurement tools for critical dimension (CD) metrology in semiconductor manufacturing are technologically advanced instruments that exhibit excellent measurement repeatability - below one nanometer in some cases. Accuracy, however, is largely dependent upon the availability of traceable standards. Because the standards requirements of this fast-paced industry are particularly demanding and application-specific, metrology traceability is sometimes lacking. International SEMATECH (ISMT) and the National Institute of Standards and Technology (NIST) are working together to improve this situation. We are developing a reference measurement system (RMS) at ISMT using a critical-dimension atomic force microscope (CD-AFM). We are performing measurements needed to establish the traceability chain and develop uncertainty budgets for this tool. Monitoring of tool performance has been improved and we have performed preliminary checks of lateral and vertical scale calibration. Preliminary uncertainty budgets for pitch and height measurements have been developed. At present, the standard uncertainty due to scale calibration and non-linearity is estimated to be approximately 0.2 percent for pitch measurements and 0.5 percent for step height measurements. Our initial checks of scale calibration were performed using samples for which a full traceability chain is not available. We expect to reduce these uncertainties once we are able to use samples with a complete traceability chain. Ultimately, our major objective in developing an RMS is to provide a traceable metrology reference for other major projects at ISMT - including CD-SEM benchmarking, AMAG wafer development, and overlay tool benchmarking.

Traditionally, CD-SEM resolution has been measured using edge and spacing measurements, where images are subjectively examined and evaluated as to edge transition width between arbitrary amplitudes or minimum measurable spacings between particles. Occasionally, methods form traditional optics, i.e., application of the Rayleigh criterion, have been quoted, but the more conservative results have caused users either to relax these traditional definitions or to abandon them altogether. More recently, as in light optics, Fourier methods, where frequency space results are used to define the resolution of the system, have been applied. In this paper, these methods are surveyed and applied to experimental data. In particular, Fourier transform approaches are examined, and the difficulties in their application vis-a-vis separation signal from noise, maintaining repeatability, and eliminating system and processing artifacts addressed. A method based on the Rayleigh criterion for diffraction limited systems is proposed that minimizes these difficulties by processing out system effects and distancing the evaluation region form both the noise and system artifacts. This method has the particular advantage of not requiring operator intervention, ensuring consistent results form user to user.

In this work we describe a simple and easy way to implement line edge roughness measurement using the Applied Materials VeraSEM 3D CD SEM. The outcomes of the measurement are the roughness amplitude and its main spatial wavelength components. In the first step we test this method on an e-beam resist wafer with known roughness and correlate the results with AFM measurements. In the second step, we measured the line roughness of a 193 nm resist FEM wafer. It was found that negative defocus is characterized by long wavelength components while positive defocus shows line roughness at all wavelengths.

The shrink of semiconductor fabrication ground rule continues to follow Moore's law over the past years. However, at the 100 nm node, the fabrication cost starts to rise rapidly. This is mainly due tot he increase of complexity in the fabrication process, including the use of hard masks, planarization, resolution enhancement techniques, etc. Smaller device sizes require higher alignment tolerances. Also, higher degree of complexity makes alignment detection more difficult. For example, planarization techniques may destroy mark topography; hard masks may optically bury alignment marks, and more film layers makes the alignment signal more susceptible to process variations. Therefore in order to achieve reliable alignment, it is absolutely critical to develop an accurate and fast simulation software that can characterize alignment performance based on the film stack structure. In this paper, we will demonstrate that we have built an extremely fast alignment performance based on the film stack structure. In this paper, we will demonstrate that we have built an extremely fast alignment signal simulator for both direct imaging and diffractive detection system based on simple optical theory. We will demonstrate through examples using our advanced DRAM products that it is capable of accurately mapping the multi-dimensional parameter space spanned by various film thickness parameters within a short period of time, which allows both on-the-fly feedback in alignment performance and alignment optimization.

As overlay budgets quickly approach a total allowed variation of around 30 nanometers serious consideration must be given to the technique used to measure overlay between successive layers. This problem becomes particularly acute if different machines are used to expose alternating layers, or if different illumination settings are used between successive layers. As a result of overlay degradation observed between two production layers, a comprehensive study was initiated to evaluate the accuracy of conventional 'frame in frame' and 'box in box' alignment schemes. The insufficient accuracy of these structures is demonstrated using experimental techniques and through the use of photolithographic simulations. Using these simulations, new overlay markers were developed to minimize the sensitivity to Zernike fringe polynomial lens aberrations in both steppers and scanners. The improved accuracy of these overlay markers is finally demonstrated by experimental techniques. Despite significant improvements in the measurement accuracy of these new overlay markers, the accuracy of present techniques may not be sufficiently accurate to measure overlay as budgets approach 30 nanometers, and new techniques may have to be developed.

As overlay budgets shrink with design rules, the importance of overlay metrology accuracy increases. We have investigated the overlay accuracy of a 0.18mm design rule Copper-Dual-Damascene process by comparing the overlay metrology results at the After Develop (DI) and After Etch (FI) stages. The comparisons were done on five process layers on production wafers, while ensuring that the DI and FI measurements were always done on the same wafer. In addition, we measured the in-die overlay on one of the process layers (Poly Gate) using a CD-SEM, and compared the results to the optical overlay metrology in the scribe-line. We found that a serious limitation to in-die overlay calibration was the lack of suitable structures measurable by CD-SEM. We will present quantitative results from our comparisons, as well as a recommendation for incorporating CD-SEM-measurable structures in the chip area in future reticle designs.

The continuing reduction of IC device dimensions puts stringent demands on the corresponding overlay performance. As part of the total overlay budget, the effects of the different process parameters need to be characterized and well understood. In a joint development program between IMEC and ASML, the robustness of different alignment strategies to process parameters has been evaluated using the ATHENA alignment system. This paper looks at both Front-end (Shallow Trench Isolation) and Back-end (W-CMP and copper dual damascene) processing. To investigate the effect of STI processing on alignment marks in Front-end processing an extensive evaluation has been performed in which both mark design and process parameters have been varied. The robustness to typical long term process variation at the STI CMP step in a production environment has also been evaluated. To improve the robustness of alignment marks in Back-end processing, new mark designs have been evaluated. These designs have been evaluated for two different processes. The first uses traditional W-CMP and sputtered aluminum. The second uses copper dual damascene, with layer stacks consisting of both conventional and low-k dielectric materials. This knowledge will be used to generate alignment strategies for future technology nodes.

In this paper, we describe a new method for the separation of tool-induced measurement errors and sample-induced measurement errors. We apply the method to standard overlay target configurations. This method is used to separate the effects of the tool and sample errors in the measured optical intensity profiles and to obtain the best estimate of the correct intensity profile for a given sample geometry. This most accurate profile is then compared to calculated profiles from two different theoretical models. We explain the modeling in some detail when it has not been previously published.

In this paper, variability in the photolithography pattern transfer process is analyzed by means of a large number of CD measurements spread across the stepper field and across the wafer. The variability is found to be highly systematic in nature, and methods are developed to extract the parameters of this systematic variation. Knowledge of the structure of the systematic variance allows for the selection of an optimum sampling plan to best capture the variance in future measurements of wafers from the same process.

This paper studies the resolution limits of optical lithography using phase-shift mask technology. Alternating phase-shift masks are studied in the context of the 70nm lithographic node. The performance of alternating phase-shift masks is measured at the limits of its resolution. Printing issues that result from phase errors on the reticle are observed. These phase errors result in a loss of depth of focus and ultimate resolution. A lithography-system-based solution to the mask phase errors is proposed. A small obscuration aperture that matches the partial coherence of the illumination is placed in the pupil plane of optics to block the zero-order light leakage that results from the phase error. This paper reports the performance and effects of using this obscuration aperture.

Electronic structure of chromium aluminum oxynitride is calculated with the embedded cluster method within the framework of discrete variational (DV)-Xa method. Then calculation is verified by comparing with the experiments of photoelectron spectroscopy such as X-ray photoelectron spectroscopy (XPS) and ultraviolet photoelectron spectroscopy (UPS). Electronic structure calculated theoretically is well consistent with photoelectron spectra under valence band. When nitrogen is substituted for oxygen in Cr-Al-O system, N2p level appears in the energy range between O2p and Cr3d level. So the valence band of chromium aluminum oxynitride becomes broader and the band gap becomes smaller than that of chromium aluminum oxide. We expect that this valence band structure of chromium aluminum oxynitride change the transmittance slope in mask application. We can properly elucidate the electronic structure of chromium aluminum oxynitride system through the theoretical calculation and experimental verification.

This paper introduces a compact but rigorous theoretical formulation of the mask error factor. The results compare favorably to experimental data as well as to first-principle simulations. This work provides an insight into the MEF causes, and it explores its dependency on process settings in order to control critical dimension (CD) variation.

With the advent of alternating aperture phase shift masks it has become necessary to Monitor quartz etch depth to ensure quality mask fabrication. To date, optical tools have been primarily used for the phase metrology of these masks. Optical tools have the advantage of using actinic light, but they also have several limitations, most notably: restrictions on the minimum aperture size to be measured, prior knowledge of which aperture is etched and alack of automation. Atomic force microscopes have a long history of depth metrology and the current tip technology is small enough to extend for the next four reticle generations while new tips are being developed to meet semiconductor device roadmaps. We examine several practical issues of using an AFM based system for the phase metrology of APSM masks; matching of AFM to optical tools automation of phase measurement and an examination of the theoretical difference between AFM and optical measurements.

Automated top down critical dimension scanning electron microscopy (CD SEM) remains the tool of choice for critical dimension process control and dispositioning. Although CD SEMs have limitations, their combination of throughput, resolution, precision, ability to measure any feature of interest and automation has been unmatched in recent years. As geometries shrink in non-uniform ways and manufacturing processes become more complicated, questions continue to recur concerning the degree of correlation between post- develop and post-etch CD measurements. For the particularly critical processing steps of forming the transistor gate, the correlation of these measurements to subsequent electrical measurements is also of major concern. Can CD SEM measurement parameters be better optimized to improve these correlations. This study attempts to answer this question by gathering CD SEM raw waveforms and AFM linescans at gate develop and etch and comparing to electrical test measurements for an advanced device fabrication process. Optimal settings of the CD algorithms working on the waveforms are then sought to improve these correlations. The tradeoff with measurement precision will also be discussed.

In this paper, we discuss a methodology for characterizing and comparing the lithographic process from the CD control point of view. In contrast to the traditional method of exposure latitude vs. depth of focus widely used in lithography, we use the statistical line width variation Cpk, and Cp as the measures of the lithographic process performance and capability. We have developed a software package called Megastat, which estimates CD variation based on experimental focus and exposure matrix (Bossung Curves) and assumed or independently measured focus and dose stochastic behavior. A similar approach was considered in. The impact of focus and dose control on across chip line width variation (ACLV) and across wafer line width variation (AWLV) was quantified with Megastat and compared to the experimentally obtained CD control for a particular 248nm lithographic process for the 130nm technology node. The statistical approach utilized in the Megastat software produced a very good match with the experimental results, which confirmed the usefulness of the statistical approach to characterizing the lithographic processes. We have additionally devised methods for decoupling and determining the actual experimental statistical variations inherent in lithographic processes. These methods allow the input 1 sigma variations for the statistical window analysis to be accurately determined. The usefulness of these methods will also be shown.

New imaging technique in AFM has been developed to suppress bending of the sharpened probe during scanning. After analyzing the bending of probe, it is clear that the bending is caused by response of servo control and slipping of the probe on the slope. It is needed that we do not scan the probe under contact of it on a sample surface for friction- free and we approach it to the surface at a contact force of < 10nN for slip-free. The technique controls the probe such that approaching and gap-controlling are done without scanning after only one step xy-scanning is competed, and the xy-scanning is done without servo controlling after lifting the probe up from the sample surface. This technique permits to use very sharped and slim probe and to observe a steep structure such as a dry-etched groove and hole, and a photoresist pattern with a high aspect ratio faithfully. We can clarify that it is possible to apply this technique to monitoring the steep structures as an in-line process monitor in the LSI process without cracking the wafer.

Optical proximity correction using both model-based and selective size adjust techniques was used as means to correct the distortion of patterns in silicon from drawn data. The performance of these corrections on silicon was evaluated using top-down SEM for both active area and gate wafers post-pattern and post-etch steps. Figure of merit such as corner rounding radius and line-edge roughness were measured. By overlapping the drawn data to the processed image, metric such as overlapping area and critical shape difference were extracted. This resulted in a range of metrics that quantified the performance of the proximity correction that was applied on the mask with reference to drawn data.

Lithography process control is one of the greatest challenges of modern semiconductor manufacturing. Due to the complexity of the overall lithography process, the number of process elements that can contribute to the process yield is large. One area of chief concern ins the control of focus on the lithography tool. Determination of the center of focus for a fixed dose during the photoresist development step in wafer processing is critical. Furthermore, dose variations can compound the difficulty in determining this center of focus. The lenses that are used in steppers have a very limited depth of focus, so utmost precision is necessary. Lense that are in focus will yield sharper printed photoresist images, and lack of focus will result in improperly developed photoresist features. Being at the center of focus also improves process repeatability. Scatterometry is a technology well-suited for lithography inspection and process control because it provides rapid measurement data and can be used for the measurement of resist line profiles. In this research we will report on several different methods for lithography focus control, including approaches that use conventional scatterometry models as well as a model-less algorithm. Comparisons will be drawn between commanded focus offsets, stage tilts and the focus response from the scatterometer. Use of the focus control techniques to map illumination modes and field non- linearity will also be shown.

The Post-Exposure Bake (PEB) is one of the critical pattern transfer steps in deep ultra-violet 248nm, 193nm (DUV) photolithography. The objective of the PEB is to activate the photo-acid produced during the exposure, which, in a self-catalyzing sequence, attacks the bonds of the organic compounds within the resist, making them soluble to the developer solution. This sequence generates more photo-acid, and the cycle continues until the process self-quenches. The acid is also rapidly diffusing along its concentration gradients, further impacting the final dimensions of the resulting pattern. All these phenomena are very sensitive to the PEB temperature trajectory, especially during the early stages of the process. Using existing state of the art equipment calibrated specifically to measure PEB effects, it has been reported that as much as 30 percent of the critical dimension (CD) error budget is due to the PEB variations from plate to plate or across one plate. Virtually all practical PEB procedures call for the rapid heating of the wafer to a recommended target temperature and time, followed by the rapid cooling down to near room temperature. The temperature and timing of the PEB and subsequent cooling are optimized for the particular photoresist chosen for processing. Due to the transient nature of the post exposure bake, aspects such as time-to-temperature, temperature overshoot, as well as steady-sate behavior must be measured, understood, and optimized in order to improve CD control, while minimizing, and if necessary, accommodating any variation across the PEB plate. Until recently, reliable measurements of the actual PEB temperature trajectories have been difficult to obtain. The PEB temperature mapping system provided by OnWafer Technologies allows for these conditions, since it is capable of processing inside the lithography track system as if it were a product wafer due to its design and its wireless nature. Furthermore, it has more than 40 rapid response sensors spread across the wafer surface, and thermal mass close to that of a product wafer. In this way, it can collect the temperature as a function of time during loading, transporting, heating and cooling, and it can provide an accurate view of the thermal history across the surface of a wafer. This information, coupled with physical models of the equipment and of the process can be used to more accurately characterize PEB behavior and its impact in CD control. Experiments done to date using the OnWafer system confirm that typical PEB steps can be too short for reaching steady-state conditions. More specifically, state of the art bake plates were found to require several seconds to heat a typical wafer within a degree of the target temperature, and they can overshoot the target temperature by a degree or more. Moreover, these plates may need a few minutes to stabilize within 0.1 degrees C from that target. Similar time constants apply during the cooling sequence. Experiments involving detailed gate layer CD measurements further validate the hypothesis that transient effects are responsible for much of the CD errors due to PEB, especially since these transient effects have a traceable non-uniformity. This paper will highlight the metrology involved in detecting PEB non-uniformities, demonstrate how the results of real-time post exposure bake data collection differ from 'static bake data test' collection and provide in-line bake data alongside collected CD data.

As the number of varied devices produced by a fab increase, coupled with an increased complexity in those devices which call for an ever increasing number of process layers, in- line process control via metrology can become an impossible task, unless metrology recipe management schemes are implemented. Logic fabs are now introducing more than 1 new device per day, which can result in the writing and management of thousands of recipes, which in turn can lead to the costly consumption of tool and personnel resources sand a general loss in productivity. In this paper we present the productivity gains to be made in the recipe creation process through off-line recipe generation, as well as a method of decreasing the recipe optimization time. We will also outline the concept of Just In Time recipe creation, its contribution to productivity gains, and its generalized implementation with respect to Overlay Metrology recipes.

As critical dimensions continue to decrease with each technology node, the precise characterization of line width and profile becomes an increasingly challenging task. Small angle neutron scattering (SANS) offers several advantages for the characterization of sub-100 nm structures, particularly as a calibrating measurement method. In this work, SANS is used to characterize three samples prepared with the same mask and focus conditions, but different photoresist formulations. The mask pattern consists of parallel lines with a nominal line width of 180 nm and a 1:2 line to space ratio. Scattering data are taken using both a focused neutron beam instrument (two-dimensional data) and a perfect crystal diffraction ultra-high resolution small angle neutron scattering (USANS) instrument. From the location and intensity of observed diffraction peaks, both the periodicity of each grating pattern and the average line widths are determined from simple analytic expressions with nanometer resolution.

Substantial effort is underway to provide a more scientific approach for understanding and assessing the capabilities of current and emerging patterned wafer inspection tools. These elaborate and highly sensitive tools require time-consuming and complex analytical methods to accurately estimate the number of significant defects per specified area while minimizing detection of false and nuisance defects. Determining an inspection tool's capabilities-including accurately estimating capture rates, false count rates, and nuisance rates-requires the employment of relevant bench marking wafers containing well known and characterized defects in product-like patterns. Using intentionally created defects with an established size, location, and process layer allows for assessing a given inspection technology and evaluating how well the software executes the underlying detection physics through validation of its output against a known. International SEMATECH has created a set of reticles that contain intentional defects arrays within product-like patterns and layers. Each IDA die contains separate areas of metal line widths of 0.18 micrometers , 0.25 micrometers and 0.35 micrometers incorporating defect sizes at 25 percent, 50 percent and 100 percent of the feature size. Advanced lithographic capabilities were used to print the array die on 200 mm wafers using short-loop recipes for simulating gate and dual damascene copper process flows. This paper describes the methodology for the IDA wafer creation and the application of the wafers in tool bench marking, took setup, tool monitoring and tool matching.

In this paper we present and characterize a NIST-traceable, all-silicon, 100 nm pitch structure with the necessary quality attributes to calibrate CD-SEM tools used for metrology of sub-0.25 micron semiconductor process technology.

We show simulation images of projection microscope, which uses parallel beam to the sample, detecting secondary electrons, photoelectrons and mirror electrons using electrons and UV/X-ray sources as probe beam. The results show we can see image for square and dense line patterns without charging and damage in the objects. This research can be used for quantitative analysis for projection microscope using multi beam source to get comprehensive information of many characteristics of objects as well as topographic information.

Conventional scanning electron microscopes are now close to the limit of their performance for tasks such as the metrology of sub-micron design rule devices. In order to overcome these limits we have designed, and are presently testing, a low voltage point source microscope operated with a nanotip field emitter and without any electron optical lenses. The microscope is designed such that can be operated in the transmission mode as well as in a reflection mode. The ultra-sharp field emitter delivers emission currents of several nanoamps at energies less than 100 eV. The magnification of the object wave is achieved by placing the specimen in the divergent electron beam from the nanotip and observing the object wave using a microchannel plate (MCP) at a great distance from the sample. Images obtained that way are out of focus images. As no lenses are present a special procedure for scaling the magnification has been developed. Since electrons from a point source are highly coherent the out of focus images of the sample are interferograms. Electrons diffracted at an edge of the specimen cause Fresnel fringes in the image plane. An electrically charged holey carbon foil acts in the same way on the electrons as the Youngs double slit experiment and results in an interference pattern consisting of parallel fringes. A comparison between the transmission mode and the reflection mode shows great similarities with respect to the magnification and the interference pattern. An electron gun needed in the transmission mode is the most important difference between the two modes of operation. The experimental results at a reflection of 45 degrees are in good agreement with our simulation. Following our simulations a reflection angle of 90 degrees is most promising for easiest image interpretation.

We developed a technique using electron beams for inspection contact holes immediately after dry etching and detecting incomplete contact failures. Wafers with deep-sub-micron contact \holes that had high-aspect-ratios of 10 could be detected during practical inspection time by controlling the charging effect on the wafer surfaces. Measurements of the energy distribution in the secondary electronics exhausted from the bottom of the holes indicated that they were accelerated by the charge up voltage on the wafer surfaces. Our analysis showed that high-density electron beams must be used to charge the surfaces when the aspect ratio is high. The minimum thickness of the residual SiO₂ that could be detected at the bottom of the contact holes was 2 nm using an aspect ratio of 8. Applying this mechanism to optimize the dry etching process in semiconductor manufacturing showed that we could achieve reliable process control.

This paper summarizes the work completed to determine if and how an electron beam affects the performance, reliability, and yield of an advanced copper semiconductor device. This study was done in the Kilby Fab of Texas Instruments located in Dallas, Texas. As IC technologies advance to smaller and smaller dimensions, the techniques used to detect defects needs to advance as well. Also the unique nature of defects and the defect mechanisms for copper dual damascene processes are much different than what was seen in the past with Al technologies that further complicate defect detection. The days of using only visible light to inspect wafers for defects is coming to an end. For these advanced technology devices, killer defects can be smaller than 0.15mm in size and may be invisible optically. To detect these types of defects, new light sources must be used to be able resolve these. Scanning electron beam (SEM) inspection has been introduced recently as a new tool to detect these defects and to give further capability to detect defects that may only have an electrical signature. For the defects which exhibit electrical defect characteristics, the scanning electron beam inspection tool can be used to charge the device under the scan causing a voltage contrast and actually detect electrical abnormalities in the circuit that can be caused by a defect in some underlying area. There has been much concern in the semiconductor industry however; that the electron beam itself can damage or affect the transistor characteristics due to the high voltage, or landing energy that is commonly used in an electron beam system. The depth of penetration of the electron beam into the layer of the wafer is dependent on the energy of the electron beam striking the surface. Another concern is that through time, the chamber walls are deposited with various contaminants such as carbon due to outgassing and the interaction of the electron beam and certain materials on the surface of the wafer being inspected, this material can be left on the surface of the wafer where the electron beam scanned. This residue can then affect the processing subsequent to the electron beam inspection causing adhesion issues or improper deposition. This paper will detail a study in which an advanced technology copper dual damascene logic device, along with a defect density test device, are subject to a scanning electron beam inspection at numerous points in the process and attempt to document the effects on the transistor performance and wafer processing. The results that were obtained from both sets of tests were that neither the transistor parametrics nor reliability were affected by the electron beam.

The emergence of Micro Electro Mechanical Systems (MEMS) in production volumes has led to the need for stringent metrology. Quality control issues prompted examination of devices via analytical scanning electron microscopes (SEM); however, residues left on the resistor structures were not visible at high voltage. Thus the processes involved in the production of these devices has limited the usefulness of the traditional high voltage SEM in the measurement of critical dimensions. This paper presents the images acquired below 550 electron volts (eV) landing energy and the associated data on such inkjet devices. This capability has proven to be extremely useful both in terms of process control with metrology, and in terms of failure analysis.

During wafer fabrication overlay performance is affected by various factors, such as the quality and location of the alignment marks, film deposition, tool control and wafer distortion during processing, e.g. after undergoing a high temperature treatment, etc. In our study, an investigation was conducted on wafer distortion by analyzing registration data measured on IVS120 overlay CD tool. The data was then analyzed using MONO-LITH software. The Overlay Yield Map analysis using the modeled data displays or predicts field yield across the entire wafer quantified by a predefined specification limit-error limit of misalignment. This analysis provides information on overlay performance of the process. The experimental results indicate that the wafer orientation before the loading in the RTA chamber plays an important role in the overlay performance, causing significant variation in overlay performance. The overall error could be as large as 0.25 micrometers though wafer orientation in the chamber could improve this, however different oven chambers were found to give different preferred orientation.

Fundamentally, advanced process control enables accelerated design-rule reduction, but simple microeconomic models that directly link the effects of advanced process control to profitability are rare or non-existent. In this work, we derive these links using a simplified model for the rate of profit generated by the semiconductor manufacturing process. We use it to explain why and how microprocessor manufacturers strive to avoid commoditization by producing only the number of dies required to satisfy the time-varying demand in each performance segment. This strategy is realized using the tactic known as speed binning, the deliberate creation of an unnatural distribution of microprocessor performance that varies according to market demand. We show that the ability of APC to achieve these economic objectives may be limited by variability in the larger manufacturing context, including measurement delays and process window variation.

The reduced CD (critical dimension) of devices places more stringent requirements on the photo process for metal layers, especially for the metal local-interconnect (MLIC) or M0 layer, which can have a minimum dimension similar to poly-gate. This layer has shown a highly localized substrate contamination defect with chemically-amplified (CA) DUV photoresists, which is related to the underlying contact plug. The failure analysis shows that reducing this defect plays an import role in enhancing the yield of a SRAM used as a test vehicle in process development. After transistors are formed, contacts to gates and source/drain regions are opened and subsequently filled with W-plugs, then a PVD TiN film is deposited as a MLIC layer between transistors. A silicon oxynitride (SiON) film is deposited as an anti-reflection layer, and a SiO2 cap is utilized as a substrate contamination barrier. However, with such a film structure, after resist patterning etch and cleaning, one major defect was often observed at the final inspection stage. This defect was always spatially-correlated to an underlying contact plug, and resulted in highly localized 'swelling' or bridging of adjacent photoresist features. In this paper, the MLIC swelling defect is characterized and its possible root causes are discussed. The correlation between the defect and the type of resist (high activation energy and low activation energy) is investigated as well. In order to eliminate the defect thoroughly or to reduce the number of defects substantially, many experimental tests have been carried out, which include the defectivity comparisons with different resists, the application of an organic bottom anti-reflection coating (BARC), the outgas reduction for poly-metal dielectric (PMD) layers, the optimization of resist striping procedure for implant layer before metal deposition, the double CA resist coating and so on. The results indicate that it is possible to eliminate the swelling defect at the photo stage by applying several special treatments.

Reducing defects in the semiconductor photolithography process has become increasingly critical. Many kinds of defects can occur during photolithography, such as missing contact holes or pattern collapses that occur during developing. As the pattern size becomes finer, the exposure wavelength has been shortened from 248-nm to 193-nm, and then to 157-nm. In addition, the resin structure and the chemical characteristics of the resist material have changed greatly. Changing the resist material from I-line to 248-nm created the problem of satellite defects peculiar to chemically amplified resist. Previous studies have suggested that a satellite defect is a complex salt of PAG, quencher, and TMAH, and is soluble in water.1) Because the resist material for 157-nm lithography is highly hydrophobic and is used for making ultra-thin films, defect evaluations of it are necessary. This paper evaluates the defects arising with various kinds of 157-nm lithography resist. Just as with 248-nm resist, a deposition defect peculiar to CAR occurs with 157-nm resist, but it occurs more frequently than with 248-nm resist. Unique defects appear with 157-nm resist, but their appearance and frequency seem to depend on the resist structure. The number of missing contact holes increases when the contact angle to ultra-pure water on the 157-nm resist film raise. It is necessary to elucidate on the mechanism that the unique defect occur in 157-nm resist.

This paper describes a new approach towards monitoring the semiconductor lithography process using critical dimension scanning electron microscopy (CD-SEM). In the lithography process, there are two important process parameters, exposure dose E and focus F. To monitor both the E and F variation, a new method for characterizing the cross-sectional profile of the photoresist pattern from the secondary electron (SE) waveform has been developed. An innovative feature of this method is that it can quantify the degree of top rounding (TR) and bottom rounding (BR) of the cross-sectional profile separately.

A correction method for automatic, high-precision CD-measurements on electrostatically charged wafers has been developed and installed in the Hitachi CD-SEM S-9260 to evaluate its performance. There are two types of charging: global and local. Global charging is stable and spreads all over a wafer while the local charging area is limited within the beam scanning area. A conventional CD-SEM has two weak points with respect to those charged wafers: one is failure at the positioning and autofocusing procedure which interferes with the fully automatic measurement sequence, and the other is disturbance of optical magnification which degrades the precision of CD-measurement values. By probing the global charging voltage with an electrostatic voltmeter prior to the CD-measurements, we subtract the voltage from a retarding voltage and then apply it to the wafer holder. The beam-focusing condition can stay within the fully automatically tunable range. And by generating numerical functions to represent the relationship between the global charging voltage, wafer height, excitation current of the objective lens and optical magnification, with the help of electron optical simulations, we can calculate the true optical magnification and the correct CD-measurement values. The local charging voltage is derived from the voltage shift of S-curves of secondary electron yield between conductive and insulated wafers measured with an energy filter. We correct the CD-measurement values using the simulated proportional relationship between magnifications of the electrostatic micro-lens and the local charging voltage. The coefficient is almost constant when the charging area is smaller than an equivalent circle of 100mm radius. We demonstrate that the CD-measurement values are successfully corrected within 0.1 percent in deviation for both charging types.

Rotating compensator spectroscopic ellipsometry (RCSE) was applied to the characterization of line-width in deep UV photoresist films. Variation of line-width in few nm was distinguishable by comparing the features in conventional ellipsometry parameters or the degree of polarization spectra obtainable form RCSE. The variations in the former spectra were caused by the density change in patterned PR films. Meanwhile, the variations in latter spectra wee caused by the surface profile of the film. Once the spectral positions of the features were related to the result of CD- SEM, both spectra could be used to estimate the line-width of patterned PR without in-depth analysis. Further, when uniaxial anisotropy was assumed for the film, the line-width could be roughly deduced in the process of extracting the optical properties of film via an effective medium approximation.

Since the carbon nanotube (CNT) tip was first reported in 1996, its application to CD metrology has been an interest because of its unique properties. It is needle-like, which is the ideal shape as the scanning probe. In addition it elastically buckles, and therefore is robust and does not produce damage to the surface. It is also hydrophobic. The conventional AFM tip has the pyramidal or conical shape, so that either the steep side wall or high aspect ratio pattern like deep and narrow trench is difficult to measure, although the obtained image tends to be more stable than with the other kinds of tips. Recently, FIB(focused ion beam) tip or HDC(high dense carbon) tip with high aspect ratio structure became commercially available, improving the measurement capability of AFM. They are, however, weaker compared with the conventional tip, and still subject to the wear and contamination. In spite of the theoretical advantages, more researches seem to be needed either to make the CNT tip practicable for the precision CD measurement or even to examine its usefulness as a routine metrology tool. At KRISS, the geometry of the CNT tip is being improved by using the 3D manipulator in SEM for better performance, while commercial CNT tips are already available. Two kinds of patterns, groove and dot, have been measured with the three kinds of tips(conventional, HDC, and CNT as home-made). The AFM measurement results are compared, and the characteristics of CNT tips at the current stage, are discussed from the practical point of view.

The scattering properties made by the irradiated two dimensional plane wave beams in the square trench are analyzed by the boundary element method (BEM) and the finite-difference time-domain (FDTD) method. We calculate the scattering patterns by using the wavelength dispersion because the silicon substrate is thought to be a dispersive and the dielectric has energy loss in the visible light range. Then, we investigate the scattering patterns by changing the depth and the width of the trench, the trench array number, and the polarization and the angles of incidence of the 2D beams. The patterns change well when the channel width is under the examined cutoff wavelength of light. Also, the radiation beam phases change well using the groove width from the range of 0.07 to 0.2 micron meters. Then, the trench depth was examined by the continuous wavelet analysis with the interference spectrum data. In the wavelet analysis, the horizontal axis (the x axis) shows the frequency and the vertical axis (the y axis) is converted into scales (1/times) and the signal strength is shown in the z axis. The vertical axis scales correspond to the reciprocal of time and it is possible to obtain the depth by multiplying time and light velocity continuously in the wavelet analysis. So the tapered trenches are analyzed using the wavelet analysis.

A high-throughput, one-step microwave technique was developed for the dissolution of photolithographic materials. The effects of dissolution temperature and digestion acid volume on the dissolution efficiency were systematically evaluated. By combining the proposed microwave digestion and inductively coupled plasma mass spectrometry techniques, the detection limits int the sub- ppb level and the analytical throughput up to 14 samples per hour were achieved for the analysis of nine metals. The novel process of using the identical bottom antireflective coating (BARC) material was applied to the KrF and ArF photoresist systems to reduce swing effect and surface reflectance on the substrate. It was found that the optimal thickness of the BARC film for the KrF and ArF photoresist systems were 62.5 nm and 119 nm, respectively.

A novel overlay registration target design was developed for the purposes of characterizing pre- and post- etch wafer-induced shift (offset) on metal layers. The new target enables the measurement of metal overlay offset during the same measurement run. The combination target was studied on production wafers and compared with the traditional two step pre- and post- etch characterization methodology. Wafer induced shift data measured by both methods showed good agreement in magnitude and direction across the wafer. The new target design was incorporated into an experiment to determine the effects of chemical-mechanical polishing, metal deposition thickness, and their interaction on the offset. Within the target process windows for both CMP and deposition, no significant dependencies of offset were observed. Analysis of this data indicated strong wafer level rotation and scale signatures, confirming offset arises from CMP and metal deposition processes. For the metal process conditions of the experiment, the offset is stable and reliable with respect to fluctuations in overpolish and deposition thickness.

Modern overlay metrology tools achieve the required metrology accuracy by controlling critical asymmetries in the imaging optics, and by compensating for the remaining asymmetries through TIS-calibration. We extend our study on the TIS-WIS interaction in stepper alignment optics to the overlay metrology tool, and propose a new method for characterizing residual TIS. This method is based on the examination of the through-focus behavior of the metrology tool on a wafer with a simple, TIS-sensitive structure.

ML 4689-80 CD Metrology for Avoiding Shrinkage of ArF Resist Patterns in 100nm ArF Lithography Tae-Jun You, Cheolkyu Bok, Ki-Soo Shin Hynix Semiconductor, San 136-1 Amiri, Bubal-eub, Ichon-si, Kyongki-do 467-701, Korea We have observed CD(Critical Dimension) shrinkage of acrylate type ArF resist patterns during SEM measurement. CD change was 30% shrinkage for line pattern and 10% expansion for contact hole patterns after 30 times measurement. CD shrinkage was proportion to line pattern size but no relation with LER(Line Edge Roughness). We confirm that CD shrinkage different from resist to resist and SEM measurement condition. CD shrinkage was bigger for acrylate type resist than COMA(Cyclo Olefin Maleic Anhydride) type resist and smaller at lower electron voltage and current conditions. In order to get the improvement of CD shrinkage, we performed electron-beam curing before SEM measurement. Above (see paper for formula) electron-beam dose condition, CD shrinkage improved from 10% to 3%. However, this method caused OPC(Optical Proximity Correction) issue as CD also changed after electron-beam curing. Therefore, we tried to develop a new measurement method instead of applying additional process technique. In this paper, we will describe our CD measurement method, Off-Site measurement technique, for 100nm DRAM lithography. The Off-Site CD measurement repeatability (formula available in paper) was controlled below (see paper).

We studied gate line edge roughness (LER) and its effect on electrical characteristics of 50nm bulk MOSFETs. Using simulation, we studied the underlying mechanism of three significant LER effects on the electrical performance of advanced 50 nm gate length bulk devices. First, we found that off-state leakage current is much more sensitive than the on-state drive current to gate LER. Second, we found that high frequency LER can lead to a decrease in effective channel length by enhanced lateral diffusion of the self-aligned source/drain extension. Third, low frequency LER causes local CD variation simply due to the statistical variation of average CD in a finite width sample. We also show how device design parameters, such as halo implant dose, can be used to tradeoff LER sensitivity and device performance.

As device performance increases, the circuitry line-width has drastically reduced. The challenges for CD-SEM metrology are not only on getting precise measurements on smaller geometries but also reducing E-beam induced charging on new resist materials. A well-known later case is the 193 nm resist processes that are extremely sensitive to the electron beam dosing. In E-beam metrology, the incremental CD deviation due to repeated charging during measurement is termed as CD carryover. Most substrate materials will typically exhibit positive CD carryover; in which line-width will grow, while trench and hole sizes will shrink. However, 193 nm resist will exhibit negative CD carryover, in which line-width will shrink, while trench and hole features will grow. With optimized landing energy and beam current, this carryover can be reduced. However, the image contrast and resolution will typically suffer. In this paper, KLA-Tencor's CEq (Charging equalization) technique is presented to minimize negative CD carryover effect on patterned 193nm resist wafers. The study was carried out on hole, trench and line structures to characterize CEq technique. The results suggested that the CEq technique could minimize negative CD carryover, especially on the hole and trench photolithography process levels.

In this paper, we will describe why the calibration process between CD-SEM and transmission electron microscopy (TEM) was performed. TEM is considered to be a unique solution such that we could obtain CD and sidewall angle accurately. TEM has the merit of having good resolution, but the measurement is performed over small segments of device features. The CD measurement error related to line edge roughness (LER) was also investigated in order to avoid the degradation in the accuracy of TEM measurement of CD. Many efforts were performed to reduce the uncertainty in TEM measurement of CD. The amount of the uncertainty related to TEM CD measurement was approximately 5 nm. We could obtain the linear relationship between CD-SEM and TEM measurements of CD Of logic gate lines ranging form 0.12 micrometers to 0.20 micrometers . The average CD measured using TEM was 15 nm lower than the CD measured with CD-SEM at poly silicon etched profile which had the sidewall angle of 86 degrees. Such difference is unacceptable in the CD measurement. The CD measurement error could be compensated with the modification of the measurement algorithms. The reproducibility of CD measurement for various algorithms was also investigated. It was shown that TEM measurement of CD could be applicable for the calibration with CD-SEM measurement to control various processes with different sidewall angles.

In modeling the optical properties of thin films, incorporation of roughness or interfacial layers is often required in the analysis of spectroscopic ellipsometric and spectroscopic reflectance data in order to achieve good agreement between the model and experimental data. The location of the roughness or interfacial layer is usually discernable from the spectroscopic ellipsometric data; however, their location is not always unambiguous from spectroscopic reflectance data. In the current work, we have explored how the spectroscopic determination of the interfacial and surface roughness layers correlates with direct measurements of the surface using atomic force microscopy (AFM). Spectroscopic reflectance and subsequent analysis of several thick films demonstrate the difficulty in placement of a roughness or interfacial layer in the optical model. The samples involved in this study have films deposited on metal substrates and include stainless steel and aluminum. We have used AFM to directly measure the surface roughness in order to improve the optical characterization and model development. As an example, we have examined an 8,000 nm silicon dioxide film on stainless steel. Models with the placement of an interfacial layer between the substrate and film, or placement of a roughness layer at the surface produce fits with nearly equivalent mean squared error values; however, the surface roughness layer is nearly an order of magnitude larger than that of the interfacial layer. Analysis using AFM shows a surface topography consistent with the magnitude of the interfacial roughness layer. In this example, the silicon dioxide layer was too thick for standard spectroscopic ellipsometry and spectroscopic reflectance was used exclusively in the analysis. For several samples with silicon dioxide on an aluminum substrate, an interfacial layer was necessary to produce a good model fit with the experimental data. These films of 500-1,000 nm thickness were analyzed using both spectroscopic ellipsometry and spectroscopic reflectance. The analysis for all films shows good agreement between the interfacial roughnesses calculated using an effective medium approximation (EMA) with AFM measurements, indicating the transfer or correlation of the substrate roughness to the surface.

Scatterometry is a promising method, capable of providing accurate profile information for a large range of applications. However, applying scatterometry to the production environment and applying it to APC is still difficult. In this paper we propose an alternative approach in which we apply a Neural Network to directly correlate scatterometry raw data and the lithography process control parameters. The proposed method is much easier to use than normal scatterometry, and can therefore be applied to APC much faster.

Advanced process control can be achieved using basic math to create a simplified cumulative sum (cusum) chart. The method is simple: plot the difference between the measured value and the desired target (error value). Each new data point is summed with the last data point. A process that is only slightly off target will be evidenced by a gradual trend towards the control limits. The farther from target the process is the steeper the slope will be, and the sooner it will breach the control limits. Subtracting a noise threshold value from the error value can control the sensitivity of the cusum chart. For example, if the threshold is 5 and the measured value is 8, the plotted value would be 3. Measured values of less than the threshold considered on-target and plotted as zero. Substantial improvements in process capability were realized using an APC system built on this simple cusum model.

In measuring films deposited on SOI structures, it was found that both spectroscopic ellipsometer (SE) and reflectance data are insensitive to the Si and O thickness in the UV regime. This can be attributed to the high absorption of the silicon film in this wavelength range. In this regime, both reflectance and SE are sensitive only to layers above Si, and to the optical constants of the Si film. The full thickness information concerning the SOI structure itself is contained in the visible region of the spectrum. In the current work, several SOI structures, with and without surface oxide films, were analyzed and are discussed. The thickness of the layer above the silicon layer varied between 1.1 nm to 700 nm. These thicknesses were obtained by modeling the reflectance and ellipsometric data in the UV-regime.

The process of shifting from human after develop inspection (ADI) to automatic detection, classification and review of macro defects in the photolithography process is overviewed. The experiences and improvements from integration of automated macro defect detection and classification systems in a full volume, state-of-the-art production fab is described.

Sensitivity to contamination continues to increase as the technology shrinks from 365 nm I-line lamp illumination to 13.4 nm Extreme Ultraviolet laser activated plasma. Gas borne impurities can be readily distributed within the system, remaining both suspended in the gas and attached to critical surfaces. Effects from a variety of contamination, some well characterized and others not, remain a continuing obstacle for stepper manufacturers and users. Impurities like oxygen, moisture and hydrocarbons in parts per billion levels can absorb light, reducing the light intensity and subsequently reducing the consistence of the process. Moisture, sulfur compounds, ammonia, acid compounds and organic compounds such as hydrocarbons can deposit on lens or mirror surfaces affecting image quality. Regular lens replacement or removal for cleaning is a costly option and in-situ cleaning processes must be carefully managed to avoid recontamination of the system. The contamination can come from outside the controlled environment (local gas supply, piping system, & leaks), or from the materials moving into the controlled environment; or contamination may be generated inside the controlled environment as a result of the process itself. The release of amines can occur as a result of the degassing of the photo-resists. For the manufacturer and user of stepper equipment, the challenge is not in predictable contamination, but the variable or unpredictable contamination in the process. One type of unpredictable contamination may be variation in the environmental conditions when producing the nitrogen gas and Clean Dry Air (CDA). Variation in the CDA, nitrogen and xenon may range from parts per billion to parts per million. The risk due to uncontrolled or unmonitored variation in gas quality can be directly related to product defects. Global location can significantly affect the gas quality, due to the ambient air quality (for nitrogen and CDA), production methods, gas handling equipment maintenance, transportation and storage processes. Fortunately, technology has been developed which can remove the killer impurities from these processes. This paper will review processes, and purification media that can be used in the photolithography processes, and detail the advances in purification technologies for removal of hydrocarbons, oxygen (where applicable), moisture, carbon dioxide, carbon monoxide, hydrogen, nitrogen (where applicable), sulfur compounds, ammonia and acid compounds from process gases such as nitrogen, CDA, argon, krypton and xenon.

Using the principle of imaging interferometry we resolve structures with a relatively low NA microscope objection which could not be resolved in the conventional illumination setup. We show experimental results for the cases of 700- and 4000-nm period gratings. We compare these results with theoretical simulations and estimate the maximum resolution potential. Also we evaluate further advantages of our approach, such as field of view and working distance.

We present 3-dimensional atomic force profiler (AFP) measurements on die-scale flatness after copper and STI CMP. True metrology is achieved for patterned wafers. Wafers are vacuum-mounted on a flat chuck, as they would be in a stepper, so wafer warpage and strain-related non-planarity are not present. The results of this new technique are compared against current measurement techniques. For logic, memory and System-on-a-chip, we discuss the implications of wafer planarity going into subsequent photolithography steps.

This paper evaluates sampling plans for overlay metrology in the context of Advanced Process Control (APC). The relationship between APC opportunity (the maximum benefit achievable via APC) and correctable accuracy is investigated. The tradeoff between spatial and temporal sampling density is considered as well. This tradeoff expresses the relationship between temporal sampling needed to realize APC benefit and spatial sampling needed to achieve a level of total overlay error. We find that the spatial sampling plan impacts both the proportion of process disturbance in the measured variability and the frequency distribution of the disturbance. As a result of a smaller magnitude and lower frequency disturbance in the10-field plan, APC performance with this plan is substantially better than with the 4-field plan. Over a realistic range of temporal sampling, APC of correctables derived from the 10-field sample plan result in a 20 to 25 percent improvement over the baseline of no control on 4-field based correctables. When APC is applied to 4-field correctables, only about 8 to 10 percent improvement is achieved.

SEM is a powerful tool to analyze a non-planar surface using back-scattered (BS) and/or transmitted (TR) electrons. When an incident beam is scanned over a target surface, both BS and TR yields vary depending on the target topology. Determining the correspondence between the yield level and the exact position of target edges is one of the main tasks of SEM analysis. A generic solution can not be achieved due to the non-local character of electron yields and the effects of actual beam size and non-perfect edges of the target elements, together with other fine effects. However, computing experiments using Monte Carlo based simulations allow investigation of effects due to different target elements on the yield level for specific conditions1,2. Moreover, simulation of the beam scanning can be very useful for 'reconstruction' of the geometry from electron yield. This paper presents a Monte Carlo based SEM simulator and analyzes the results obtained. An approach to accurately localize target edge features is proposed.

The combination of field emission scanning electron microscopy (FESEM) and focused ion beam (FIB) is a future key technology for semiconductor and material science related applications. A new CrossBeam tool is discussed in this presentation. Through the combination of the well known Gemini ultrahigh resolution field emission SEM column and the well known Canion31 + high performance FIB column a wide field of applications can now be accessed. This includes structural cross-sections for SEM and transmission electron microscopy (TEM) applications, device modification, failure analysis, sublayer measurement and examination, as well as SEM and FIB related analytical techniques such as energy dispersive x-ray spectroscopy (EDS), wavelength dispersive x-ray spectroscopy (WDS), secondary ion mass spectrometry (SIMS) etc. Real time high resolution SEM imaging of the cutting and deposition process enables the researcher to perform very accurate three dimensional structural examinations and device modifications.

Previous studies of the interaction of electron beams with different types of ArF resists have shown the undesired phenomenon of the resist shrinkage. The lateral component of this shrinkage has been detected and quantified easily by SEM CD measurements. However, the vertical extent of this phenomenon has to date remained unknown. In this work we present measurements of the changes in height and sidewall angles of an ArF line by using a new e-beam tilting ability of the Vera SEM 3D. The 3D measurement results show that the height of the line shrinks in similar proportions to the top and bottom CDs, with a difference in the magnitude. Due to higher penetration depth of the e-beam on the top of the line than on the sidewall, the vertical shrinkage reaches steady state more rapidly than the lateral shrinkage. We also found a slight reduction in sidewall angle, which is less than one degree even under high e-beam exposure.

We present a new technique for accurate and fast evaluation of lithographic imaging performance at critical dimensions (CDs) of 100 nm and below. Its advantages over traditional methods that use either SEM or electrical CD metrologies are based on two key factors. First, it exploits a specially designed mark corresponding to a particular CD. Second, instead of mark dimensions the mark image irradiance is measured with a CCD TV camera. In combination, these provide an easy-to-implement and inexpensive technique for controlling exposure tool imaging performance. In actual application, best focus determination shows a repeatability of less than 5 nm.

Semiconductor manufactures using ASML exposure tool shave traditionally used a zero layer mark approach and Through- the-lens (TTL) alignment system to align all production layers of a device. Future ASML exposure tools will no longer have the TTL system and will exclusively employ ATHENA, which is an off-axis alignment system utilizing two wavelengths and higher diffraction orders. In anticipation of this conversion, an evaluation has been performed using IDT's standard alignment scheme to compare the performance of ATHENA to that of TTL for the alignment of the Gate layer to the STI layer. Standard XPA and higher diffraction order enhanced XPA mark types were evaluated using the zero layer approach, as well as non-zero layer enhanced scribeline SPM marks. TTL alignment to both standard and enhanced XPA marks showed a good alignment capability, with enhanced marks showing a slight improvement over standard marks. ATHENA alignment to XPA marks gave similar results, although the red wavelength was shown to be slightly more stable than the green. CMP and thin film stack splits showed no significant correlation to alignment capability for any mode or mark type.

We present nanometer-scale physical structures and analysis algorithms for characterizing tip width and shape for critical dimension atomic force microscopy (CD-AFM). Automated CD-AFM measurements will be used in future generation, and a robust methodology is demonstrated for ensuring long-term repeatability of width measurements on sub-100 nm structures. Structures are designed and chosen for their width uniformity on the sub-nm scale, as well as for their well defined shapes that can be deconvolved from the scan data to yield a precise image of the tip. We apply our tip characterization techniques to measurements of photoresist linewidth, contact etch and poly Si gate width in a manufacturing environment, and show that tool performance and characterization strategy can combine to give excellent long-term repeatability.

More than decades the optical overlay metrology system is still using for the measurement. However, many results are reported on the subject of the mismatch between optical overlay measurement form overlay mark and real pattern registration that is caused by lens aberration, mask registration, dynamic distortion on chip level and wafer induced shift of overlay tool on wafer level. Therefore there are lots of report to investigate and resolve this gap. In this report, we study the measurement of overlay related value with slant measurement on real pattern. After etch a real pattern could be used for the overlay check at specific steps so that the registration excursion is checked using high resolution SEM image. Even though the slant value is not enough to obtain whole vector of overlay it is enough to check the overlay excursion along with critical direction. Also with specific structure the exact overlay can be measured and it is comparable with optical overlay value. Using this structure the Across Field Overlay Variation is successfully measured. The precision of the measurement is achieved same level of R and T on CD measurement. However there are still some limitations to be optimized on the algorithm because that is designed for the single contact-hole analysis to check the contact profile.

We have investigated the impact due to subtle deviation form the actual illumination pupil shape to the intended setting. We show that the impact on resist CD prediction is a function of feature pitch and the predicted CD error can be significant. Consequently, the calculated MEEF through pitch can also be notably different for the non-uniform illumination aperture plane. In this study, we have investigated CD error and MEEF through pitch for 6 percent attenuated PSM and CPL mask using LithoCruiser. The annular non-ideal illumination aperture plane used in this investigation is generated externally and then imported into LithoCruiser. Here a small percentage of pixel deviation is introduced into the shape of the annular aperture to emulate the possible error that could occur in a scanner. Gaussian and SuperGaussian intensity distributions are used to compare with the ideal rectangular intensity profile. We found that the shape deviation of the distributions are used to compare with the ideal rectangular intensity profile. We found that the shape deviation of the aperture can cause a larger CD error compared to intensity variation at the aperture can cause a larger CD error compared to intensity variation at the aperture plane. It appears that the CD error and the MEEF are both larger for 6 percent attPSM than CPL mask. We have shown that by applying OPC, it is possible to reduce the predicted CD error caused by 'non-ideal' illumination aperture. The presented simulations are performed at NA equals 0.8 using KrF.

The massive amount of data necessary to qualify a new 100nm generation technology can be efficiency collected using a CD-SEM and analyzed using Klarity ProData. By comparing the linewidths, space widths, and pitches printed in resists with different focus, exposure does, and numerical aperture with the measured reticle parameters, one can be determine optimal processing conditions and the required biasing rules for the new technology. The Sidewall Chrome Alternating Aperture Mask, a next generation alternating phase shift mask structure, is especially suitable for this as all relevant mask features are visible from the top surface which, however, is not planar and thus can confuse optical mask inspection tools. Resist patterns with line-space pitches from 220nm to 800nm and isolated lines - as well as the reticle - were measured sing a KLA-Tencor 8250 CD-SEM and analyzed with ProData. At the isofocal dose, the 70nm line - 150nm space reticle pattern printed with equal 110 nm lines and spaces at NA equals 0.63 on a Canon FPA-5000 ES3 248 nm step and scan tool, with a process window that overlapped those of less dense approximately 100 nm features.

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Exposure wavelengths have shortened remarkably as device design rules have become increasingly minute. The switch over from KrF to ArF exposure and the development of techniques to use an even shorter wavelength of 157 nm have led to various problems related to the exposure process and changes in the resist materials. In this paper, we focus on 157-nm exposure, which will require thinner resist coatings and new resist materials to deal with the effects of light absorption and solvent transparency. We expect the structure and characteristic of future resist materials to be greatly improved compared to those of the current model. Despite the use of new resist materials, the need to lower the number of defects occurring during the lithography and finer design rules will make environmental control increasingly important as regards critical dimension control. Our knowledge of what environmental control will be needed is incomplete, though, and so we examine some of the environmental factors that will affect lithography with 157-nm exposure in this report.

As semiconductor design rules become increasingly complex, there is growing demand for a reduction in defects in lithography processes, and the process that contributes most to such defects is believed to be the developing process. The control of defects occurring in chemically amplified resist due to changes in the resist structure has been growing in complexity. Today, when the exposure source is about to undergo a transition from KrF (248 nm) to ArF (193 nm), the controlled objects in defect inspection decrease in size, becoming smaller than the particle size that can be handled by inspection machines. For defect control against the background of the increasing miniaturization anticipated in the future, it will be necessary to gain an understanding of the behavior of ultra micro defects contained in developers. This report concerns the consideration of defect behavior in developing fluid resulting from the quantification of defects occurring due to resist dissolution in the developing fluid, and from defect behavioral analysis performed on the developing fluid.

The demand for manufacturing integrated circuit with high circuit speed and high packing density requires reduced feature sizes in ULSI structures. As the device feature size shrinks below sub-130 nm it needs the tight control of defect reduction in lithography process. Especially, resist peeling at the wafer edge is one of the major sources for particle generation. The WEE process removes resist up to a width of a few mm from the wafer edge in order to prevent particle generation in succeeding process. The defect induced form wafer edge after WEE has given the critical damage to electrical properties and device yield. In this paper, we have applied novel WEE kit to reduce the rainbow bandwidth caused by WEE step in wafer wedge. The novel WEE kit consists of chrome slit and lens assembly to minimize the scattering of UV beam from the optic fiber in comparison with the conventional WEE kit. The change of rainbow bandwidth was also characterized by OM and SEM. With the novel WEE kit the bandwidth of rainbow is reduced to 5 micrometers , while the conventional WEE kit has been induced 20 micrometers of bandwidth on bare silicon wafer. In the case of patterned wafer, the bandwidth of rainbow is reduced to 60 micrometers for the novel WEE kit, while the conventional WEE kit has induced 230 micrometers of bandwidth. Therefore, ti is confirmed that the application of novel WEE kit has induced 230 micrometers of bandwidth. Therefore, it is confirmed that the application of novel WEE kit for patterned process makes less rainbow defect and finally increases the device yield for mass production.

Overlay budgets are getting tighter within 300 mm volume production and as a consequence the process effects on alignment and off-line metrology becomes more important. In a short loop experiment, with cleared reference marks in each image field, the isolated effect of processing was measured with a sub-nanometer accuracy. The examined processes are Shallow Trench Isolation (STI), Tungsten-Chemical Mechanical Processing (W-CMP) and resist spinning. The alignment measurements were done on an ASML TWINSCANT scanner and the off-line metrology measurements on a KLA Tencor. Mark type and mark position dependency of the process effects are analyzed. The mean plus 3 (sigma) of the maximum overlay after correcting batch average wafer parameters is used as an overlay performance indicator (OPI). 3 (sigma) residuals to the wafer-model are used as an indicator of the noise that is added by the process. The results are in agreement with existing knowledge of process effects on 200 mm wafers. The W-CMP process introduces an additional wafer rotation and scaling that is similar for alignment marks and metrology targets. The effects depend on the mark type; in general they get less severe for higher spatial frequencies. For a 7th order alignment mark, the OPI measured about 12 nm and the added noise about 12 nm. For the examined metrology targets the OPI is about 20 nm with an added noise of about 90 nm. Two different types of alignment marks were tested in the STI process, i.e., zero layer marks and marks that were exposed together with the STI product. The overlay contribution due to processing on both types of alignment marks is very low (smaller than 5 nm OPI) and independent on mark type. Some flyers are observed fot the zero layer marks. The flyers can be explained by the residues of oxide and nitride that is left behind in the spaces of the alignment marks. Resist spinning is examined on single layer resist and resist with an organic Bottom Anti-Reflective Coating (BARC) underneath. Single layer resist showed scaling on unsegmented marks that disappears using higher diffraction orders and/or mark segmentation. Resist with a planarizing BARC caused additional effects on the wafer edge for measurements with the red laser signal. The effects disappear using the green laser of ATHENAT.

Understanding the development rate of resists is critical for the characterization of photoresist formulations and accurate modeling of the photolithographic process. Most commercial development rate monitors (DRMs) are based on the optical interference of a single wavelength of light. (Perkin-Elmer DRM5800; Litho-tech Japan RDA-790). DRMs based on the interference across a broad spectrum of wavelengths, known as multi wavelength DRMs (MW-DRM), were first reported by Konnerth1,2 and have also been used for photolithographic research3,4. This technique has been applied to commercial DRMs (SC Technology Inspector), but the high cost of these tools has made them inaccessible to most research and development facilities. This paper describes the development of a new cost-effective, scaleable, multi-channel DRM that allows collection and calculation of multiple development rate curves using MW-DRM technology. Techniques are presented for collection of multi wavelength data at rates exceeding 80 Hz, which in turn allows the study of photoresists that develop at rates in excess of 5 microns per second. The algorithms necessary to analyze this data are presented. The use of these algorithms for the extraction of development rate curves is demonstrated with resists that exhibit surface inhibition and standing waves. The use of multi-layer algorithms to collect development rate information in films between 0 and 200 nm thick is also shown. Finally, the use of these techniques for characterization of deprotection in chemically amplified photoresists, is presented.

Aggressive roadmaps impose stringent requirements not only on the metrology tools but on photoresist properties as well. In this article we investigate the interaction between electron beam in a CD SEM and different photoresists in an attempt to determine appropriate candidates from metrology point of view. We have evaluated sample damage (carryover) in order to find an approach leading to reduction of the sample degradation in the course of the measurement process and improve measurement precision. We have observed various linewidth changes under conditions expected in the case of single-tool repeatability, stability or multiple-tool matching procedures for CD SEM. The experimental data show that while all examined photoresists experienced certain changes some of them demonstrate less sensitivity. For modern CD SEM in addition to electron energy and current as factors defining the carryover, the possible effect of the clean room environment exposure should be considered as well. Recommendations have been made with respect to acceptable compromise based on the current precision requirements.

The accelerating trend to smaller linewidths and low-k1 lithography makes metrology and process control more challenging with each succeeding technology generation. Optical CD metrology based on spectroscopic ellipsometry provides higher precision, improved matching, and richer information for line width and shape (profile) control which complement conventional litho metrology techniques. Analysis of site-to-site, within-field, field-to-field, and cross-wafer CD and line-shape distributions using KLA-Tencor SpectraCD permits separation of sources of variation between the stepper and track thus enabling proper process control. Focus-exposure analysis using SpectraCD data provides a more complete understanding of the lithography process window. Comparison between SpectraCD CD measurements on nominal 1:5 Line/Space ratio grating targets to isolated line CD-SEM measurements show excellent correlation over a large focus-exposure process range, including sub-100nm features. This result provides verification that SCD measurements on grating targets can be used to monitor and provide feedback to lithography process for isolated lines.

Process tolerances for critical dimensions are becoming increasingly severe as lithographic technology drives the minimum integrated-circuit feature size toward 0.1 micrometers and below. In response, Optical Critical Dimension metrology (OCD), an optical-wavelength light-diffraction technique, is currently undergoing an industry-wide evaluation as a fast, accurate, and non-destructive sub-100nm line-width monitor. As such, effective process monitoring requires detailed understanding of the correlation between CD-SEM and the OCD measurements. Correlation in CD measurements between the OCD technique and SEM techniques is investigated in this paper by measuring photo-resist gratings on a polysilicon gate film stack. Intra-grating CD variation is shown to account for scatter in the correlation plot. A positive offset in the correlation is also observed and a mechanism is proposed to account for the discrepancy. Correlation between CD-SEM and OCD is also demonstrated for samples with three different pitch sizes. A qualitative line-profile correlation between cross-section SEM (X-SEM) and OCD is presented for photoresist gratings in a Focus Exposure Matrix (FEM).

Recently, the interest in enhancement of critical dimension (CD) accuracy has been significantly increased to satisfy requirements of sub 100nm devices. Proximity effect correction becomes an indispensable choice to improve CD accuracy within local area, and fogging and loading effects compensation has been tried to enhance global CD uniformity. However, proximity effect correction (PEC) parameters obtained without considering additional exposure such as fogging effect and the exposure to compensate it are not appropriate to fabricate real devices. In this paper, we investigated the relation of PEC parameters and various pattern densities and additional exposure experientially, analyzed theoretically using the edge image model to describe absorbed energy. Through evaluations, we could optimize proximity effect correction parameters for EBM-3500 taking additional exposure into account, and realize higher CD accuracy in mask fabrication.

Optical proximity effect is a well-known phenomenon in photolithography. Such an effect results from the structural interaction between the main feature and the neighboring features. Recent observations have shown that such structural interactions not only affect the critical dimension of the main feature at the image plane, but also the exposure latitude of the main feature. In this paper, it has been shown that the variation of the critical dimension as well as the exposure latitude of the main feature is a direct consequence of light field interference between the main feature and the neighboring features. Depending on the phase of the field produced by the neighboring features, the main feature exposure latitude can be improved by constructive light field interference, or degraded by destructive light field interference. The phase of the field produced by the neighboring features can be shown to be dependent on the pitch as well as the illumination angle. For a given illumination, the forbidden pitch lies in the location where the field produced by the neighboring features interferes with the field of the main feature destructively. The theoretical analysis given here offers the tool to map out the forbidden pitch locations for any feature size and illumination conditions. More importantly, it provides the theoretical ground for illumination design in order to suppress the forbidden pitch phenomenon, and for scattering bar placement to achieve optimal performance as well.

The beam parameters of CD SEM, accelerating voltage, beam current, measurement time, frame number, and magnification are evaluated to get the optimal setting for reducing the shrinkage of ArF resist. We check image resolution, resist shrinkage amplitude, CD bias between resist line and etched pattern to valuate the impact of beam parameters. On image resolution, the poly film is better resolved with the 800 V accelerating voltage. On the other hand, 300 V is more suitable for resist image. It also produces much lower resist shrinkage compared with 800 V. Beam current, measurement time, frame number, and magnification produce much less impact on resist shrinkage than the accelerating voltage. On CD bias, we also found that 300 V produces better accuracy and stability compared to 800 V. This is attributed to the lower resist shrinkage. Finally, we suggest an important concept that the optimal beam condition cannot be judged only by precision and resolution but also by the resist shrinkage and CD bias stability.

Poly-gate critical dimension (CD) control has become a major concern as technology advances towards the 130nm node. The presence of optical proximity and plasma microloading effects in today's IC fabrication has a severe impact on through-pitch CD uniformity. Poor through-pitch CD uniformity causes a large intra-die CD variation and degrades device performance. Optical proximity effect can be corrected by available optical proximity correction (OPC) software. Plasma microloading effect was normally compensated at 180nm technology node by changing optical proximity behavior. This technique usually degrades the lithography process window such as the depth-of-focus (DOF). At 130nm technology node, this technique becomes impractical as lithography process window is already marginal. To ensure a sufficient lithography process window at 130nm node and beyond, it is very important to separate the plasma microloading effect from optical proximity effects. Plasma microloading effect by itself cannot be removed without any compensating mechanisms. Here, the micro-loading effect of resist trimming was employed as a compensating mechanism. Through-pitch-trim-bias of resist trimming process can be adjusted such that it compensates the through-pitch-etch-bias of poly-gate etching. By controlling the microloading of resist trimming, an improved overall through-pitch CD uniformity (trim plus poly etch) can be achieved. Without any compensating method, a 15nm after etched CD difference between the isolated and dense features is normally seen. By employing the resist trimming compensation method, after etched CD difference between isolated and dense features can be reduced to less than 8nm. This improvement does not bring about any degradation to the lithography process window.

Contrast Enhancement Lithography has been in existence for almost two decades, yet its practical advantages are relatively unknown among the general lithography community. This paper attempts to redress this situation by discussing the implementation of a Contrast Enhancement Material into manufacturing. Contrast Enhancement Materials (CEMs) are photobleachable solutions applied as a thin top coat to the photoresist after softbake. The CEM is initially opaque at the actinic wavelength but becomes essentially transparent upon exposure. Optimising the relative bleaching parameters of the photoresist and the Contrast Enhancement Material makes it possible to prevent exposure in nominally unexposed resist regions, while bleaching the exposed resist areas. Thus, a temporary contact mask is formed on the photoresist during exposure, allowing high-intensity parts of the aerial image to pass through while eliminating low intensity regions. The resulting aerial image which exposes the photoresist has higher contrast than the original. This allows superior resist depth-of-focus, improves resist profile, increases exposure latitudes and reduces proximity effects among other benefits. Initially, this paper discusses the chemistry and physics of the CEM process. Next the authors look at the lithographic requirements for a final metal level on a sub-micron CMOS process. Analysis of the Depth-Of-Focus error budget indicated that the process would not be manufacturable without significantly increased DOF. The authors also present the results of the characterization of the CEM, including simulation work, with regard to the effect on primary lithography outputs such as depth-of-focus, resist sidewall and exposure latitude.

Wafer dimensional metrology, used to qualify substrates for lithography at the appropriate critical dimensions (CDs), historically reports shape and flatness. While these metrics have enabled several generations of educated wafer procurement, the high numerical aperture (NA) lithography required for sub-wavelength CDs now in production is becoming sensitive to front surface topography that is not reported by either shape or flatness. SEMI Standard M43, Guide for Reporting Wafer Nanotopography, is now published. According to this guide, 'Nanotopography is the non-planar deviation of the whole front wafer surface within a spatial wavelength range of approximately 0.2 to 20 mm and within the fixed quality area.' These nanometer scale non-planar deviations lead to within-die, die-to-die, and wafer-to- wafer variation that contributes to the overall focal budget. Several advanced CMOS device manufactures are no specifying incoming wafer nanotopography. These manufacturers all produce complex, high-speed, large die- size chips. In the following we detail wafer nanotopography metrology and nanotopography quantification. We also explore several known correlations of nanotopography to leading edge process integration issues.

To obtain good overlay performance, the quality of the wafer marks should be well designed. Although different brands of steppers and scanners use unique mark pattern design and alignment system, these exposure tools determine the position of marks through the signal obtaining from the height difference within the mark region. The largest problem of the marks is that the quality of the marks is influenced by the process conditions, such as film deposition, chemical mechanical polishing, and etching conditions, etc. In this work, we studied the impact of the CMP on the quality of the ASML alignment mark. The film structure and process flow are also investigated to understand the deformation of marks for different clear-out scheme. The lot-to-lot overlay variation can be prevented when the new clear-out scheme is employed.

A model for ASML's ATHENA alignment system based on electromagnetic simulation of scattering from the alignment mark structure is presented. The seven lowest scattered order pairs are calculated for various mark topographies. The scattered order pairs are analyzed to determine both the signal strengths and alignment errors. Both a rigorous and a scalar model for calculating scattered orders are presented and compared. The models are then used to investigate the importance of topographical variations such resist thickness and surface shape, and mark asymmetry caused by CMP. The clipping of one side of the chop marks was seen to introduced alignment error of equal magnitude in all several order pairs. Resists variations were also found to be very important affecting both signal strength and alignment accuracy. Simulation is found to be a useful tool in understanding stepper alignment engineer develop strategies for improving alignment.

A new algorithm for correcting misalignment between layers is introduced which is capable of compensating for interdependencies and arbitrary conventions of correctable factors. In this approach, optimal corrections are determined from solving a set of linear equations that exactly negate the effect of the observed misalignment. A series of calibration runs were performed by measuring the effect of a balanced set of forced input corrections on the resulting alignment in order to determine elements of a transformation matrix. This technique was able to calculate the average corrections required to reverse the input offsets within an average of 10nm for translation and 0.1ppm for magnification and rotation offsets. Estimated standard deviations between calculated and input offsets were smaller for y parameters than x, presumably because of better stage reproducibility in the vertical direction. The transformation matrix for Canon EX4 steppers highlighted that chip rotation is affected by inputting corrections to x axis wafer rotation. Calibration wafers with alignment sites that simulated wafer rotations of +/- 0.8585ppm were fabricated. These wafers verified that chip rotation occurs for EX4 steppers as a consequence of automated adjustment for x wafer rotation. The observed responses from these calibration wafers agreed within nanometers of the relevant element of the transformation matrix for that stepper family.

A large format individually addressable Micro-Mirror-Array (MMA) has been developed at NASA, GSFC for possible application in the Next Generation Space Telescope (NGST). The 100micron X100micron aluminum micro-mirrors are built on top of CMOS driven address and driver circuit for individual addressing. The high voltage CMOS fabrication process produces about 2.8microns surface roughness on the silicon wafer. The wafer surface is planarized before integration of the MMA. Three different planarization materials were evaluated; polyimide, spin-on glass and BCB. BCB showed the best results for our application. A single layer of BCB coating reduced the surface topology from 2.8micron to less than 1,700Angstroms and two layers of BCB coating reduced the surface topology to about 600Angstroms. Since the MMA has to operate at 30K for the NGST application, a wafer coated with cured BCB was dunk tested in liquid nitrogen at 77K and no cracks were found after thermal cycling. For specific application in NGST, the optical reflectance of BCB was measured at 40K over 1-5micron wavelength range and the results showed that BCB could absorb 30-40 percent of infrared light over this range. Details of coating, curing and etching properties of BCB are discussed along with its low temperature optical properties.

Due to miniaturization of semiconductor devices, ArF (193nm) lithography is likely expected to be used for sub 100nm regime. For sub 100nm devices, high NA exposure tools and various strong off-axis illumination (OAI) conditions should be used. But unlike KrF (248nm) lithography, resist pattern collapse becomes one of the most serious problems in ArF lithography. In order to solve pattern collapse problem, thin resist process is generally introduced but its poor etch resistance is an obstacle for being applied in real production process. Due to this reason, new kinds of organic BARC materials are investigated and optimized to avoid pattern collapse. As mentioned, the most important issue in ArF organic BARC is believed to be the pattern collapse problem. A number of organic BARCs were made by varying polymer, cross-linker, thermal acid generator, and additive. We tried to analyze the key factor in terms of pattern collapse. This paper is to compare the various elements of the organic BARC formulation and to discuss what brings and causes pattern collapse.

In the DUV lithographic process, airborne contamination, such as ammonia and 1-methyl-2-pyrrolidinone, is known to present several processing problems. Presently, these airborne contaminants are effectively controlled using either acid-base or ion-exchange chemistry. However, as lithographic processing moves towards the creation of smaller features using 193 nm and 157 nm technologies, airborne and condensable organic contamination presents an ever-increasing concern. In addition, the wide range of chemical and physical properties of the organic contaminants found in the processing environment, do not lend themselves to effective control using the specific chemisorptive techniques currently applied. In conjunction with our efforts to design improved chemical filters for the effective control of organic airborne contaminants, we have attempted to characterize the organic airborne contamination found in the lithographic processing environment. In addition, we have evaluated the effectiveness of activated carbon filters for their removal. In this report, we will present our current findings and reveal some of the benefits and concerns associated with the use of activated carbon-based chemical filters for the control of organic airborne contamination in present and future processing applications.

We report here on initial results for the characterization and modeling of 100 nm lithography features based on normal incidence spectroscopic ellipsometry and polarized reflectometry. In this work, a set of wafers was exposed as focus-exposure and separate focus or exposure matrices to create resists patterns with extremely small variations in CD and pattern shape. These variations were generated along scan, within slit and across full wafer. Optical CD scatterometry was used to extract critical feature parameters such as complete shape and associated linear dimensions. Extracted pattern parameters were compared to FIB sections and used to predict lithography process latitudes. We explore effects of using multi normal incidence ellipsometric signals with various profile models to increase accuracy of extracted lithography parameters. We propose a metric for identifying effects of scan-dynamic does and focus variations upon slit-intrafield and scan- intrafield CD errors. This has been tested over ranges of defocus and exposure that are larger than typical FE latitudes of 100 nm features. As a result of spectroscopic scatterometry calculations of pattern shape, we identified pattern shape variations caused by dose and defocus that are clearly coupled to changes in feature size. These could be used for unique determination of dose-focus deviations using scatterometry-extracted information from measurements of a grating structure.

Further analysis on how wafer distortion affecting the overlay performance during annealing treatment in GaAs wafer fabrication was conducted quantitatively using MONO-LITH software. The experimental results were decomposed as wafer translation, scaling at X and Y direction, rotation and orthogonality. The grid residual was used to describe non- correctable distortion of the wafers, which fits the equations given below: Residual equals Measured - Modeled, which is not a modeled component. The Vector Map displays distribution of error vectors over the wafer or field for various components or overall effect. Based on the component analysis that the misalignment caused by translation and scaling can be compensated by heat treatment if the wafer is placed at a favorable orientation. This can help mitigate the effects of substrate quality in manufactory.

A system for monitoring the dynamic temperature profile during the deep UV (DUV) post exposure bake (PEB) is described. Platinum resistor temperature detectors (RTDs) are embedded into silicon wafers. Hardware and software convert the resistances to temperatures. The RTD calibration is National Institute of Standards and Technology (NIST) traceable. The wafers are tested on both a thermally uniform hot plate and a production PEB chamber. The temperature profiles for the PEB are fitted to a heat transfer model allowing heating and cooling time constants to be determined. High accuracy and precision are demonstrated.

In this paper, we describe the optimization strategy for Eth (Dose to clear) method of DUV resist process control for 0.25um technology. Both experimental and simulation results will be presented to show the optical and developing behaviors of DUV resist in extreme low energy exposure condition. Based on these data we proposed an optimized method of Eth measurement. With this method, false alarm of DUV resist photo-speed and exposure out of control will be eliminated, cost of manpower for OOC troubleshooting will be saved.

Numerous reports have shown consistent evidence that automated run-to-run feedback control of overlay correctable coefficients will provide clear benefits when applied to fabs with steady-stream process flows that are associated with low part count WIP profiles. When the same methods are deployed in unsteady-flow, higher part count operations the results have been mixed. Within these high part count operations, some process flow streams show improvement while others do not. Attempts at optimizing the feedback loop have failed to achieve desirable result for all process streams - some process streams would benefit while others would lose ground. In this study, we will show how a structural change in the run-to-run control algorithm provided a breakthrough in both performance and understanding of the underlying system dynamics. The first step was to recognize the fundamental difference between reticle-sourced overlay errors versus tool and process sourced errors. The recognized difference was that the reticle-sourced errors were highly stable over long periods of time, thus enabling deconvolution of reticle effects from the higher frequency tool and process effects. The second step was to recognize that the frequent reticle changes that occur in a high part count fab could be modeled as a feedforward disturbance rather than as discriminates in defining and dividing process streams.

The National Institute of Standards and Technology (NIST) has provided industry with a scanning electron microscope (SEM) magnification calibration sample Reference Material (RM) 8090. The certified, Standard Reference Material (SRM) version, SRM 2090 is currently being prepared for issuance. This paper describes the design and development of a new, PC-based measurement and control system developed to facilitate the certification of the SRM 2090 artifact samples in a specialized metrology microscope. SRM 2090 is certified by moving the sample under a finely focused stationary electron beam in the metrology electron microscope. Using a laser interferometer with displacement measurements traceable to basic wavelength standards, the motion is measured while recording the secondary or backscattered electron output signal. A computer controls the motion, records the signal and interferometer value, then calculates the accurate spacing of the features, completes the statistical work and generates the NIST certificate. The original measurement system design was developed in the early 1990s. This paper outlines the effort to upgrade the system, including the replacement of the outdated measurement and control system with a new, LabVIEW based measurement and control system. The details of the new measurement and control system will be discussed and results will be presented.

Nanometrology's unique solution to CD-SEM magnification calibration and matching. This utilizes a novel magnification calibration reference material (MCRM) designed and fabricated on an 8 inch wafer. When used with the proprietary software, it allows one to calibrate and match individual CD-SEMs. CD-SEM behavior can now be quantified in terms of its parameters such as the average magnification in the field of view (FOV), magnification non-linearity and magnification stability. It is essential to quantify these parameters with a precision of 0.1 percent or better in order to meet requirements for sub-100nm metrology.

Nanometrology LLC has developed a unique set of solutions for optimizing CD-SEM metrology by improving signal to noise ratio and quantifying scan non-linearity. Examples of Nanometrology's solutions for improved CD-SEM magnification calibration are demonstrated using CD-SEMs from a variety of user sites. To our knowledge, this is the first time that a method to quantify CD-SEM scan non-linearity with precision 0.1 percent has been reported. Calibration precision of 0.1 percent or better can be achieved on both cross-section and CD-SEMs to enable them to meet or exceed the requirements of the ITRS roadmap beyond 2014.

We have developed fast numerical solutions to the diffraction of light from periodic array structures that allow real-time regression fitting to optical data. In contrast to previous publications, the solutions we have developed are easily applied to focused beams with arbitrary angles of incidence on periodic structures with complex shapes and multiple layers both within and below the structure. The adaptive nature of the shape definition makes it relatively easy to characterize typical microelectronic patterning effects, including undercut, rounding, footing and encroachment in a robust manner on poly-gate, STI, Damascene and resist structures. This real-time approach is not limited by a priori knowledge or assumptions about the range of variation of the CD parameters, and is therefore able to deal with large excursions in process parameters. It is also not limited by parameter discretization effects. The program itself is easily configured for any type of optical measurement (ellipsometry, reflectometry, etc). Data will be presented for several categories of microelectronic CD structures that have been measured with this approach.

The Grating Division-of-Amplitude Photopolarimeter (G-DOAP) obtains very rapid measurements of the complete polarization state of light over the spectral bandwidth of the instrument. Application to polarimetry, ellipsometry, and Mueller matrix ellipsometry is discussed. The use of MME is illustrated by measurements and analysis of the depolarization produced by reflection at a thick oxide-coated silicon wafer.