This PDF file contains the front matter associated with SPIE Proceedings Volume 10292, including the Title Page, Copyright information, Table of Contents, and Conference Committee listing.

We discuss approaches to achieving large scale InP-based optoelectronic integrated circuits (OEICs) and photonic integrated circuits (PICs). For the last several years, we have developed such platform integration technologies, with a recent success being the demonstration of a 16x16 InGaAs/InP imaging array consisting of 272 field effect transistors and 256 p-i-n detectors. Both growth and processing of the platform structure are simple and robust, allowing for large-scale integration of optical and electronic devices. Other components which have been demonstrated using this versatile receiver/focal plane array technology have been very high sensitivity switched photodiode receivers, and coherent optical receivers. The transmitter technology consists of a modified twin waveguide structure which allows for fault tolerant fabrication of photonic integrated circuits employing any combination of lasers, optical amplifiers, modulators and waveguides. The extremely high yield and simplicity of processing of such InP-based LSI circuits suggests that the scale of optoelectronic integration in this important materials system has reached a new, and highly useful level of sophistication.

A large number of novel devices have been recently demonstrated using wafer fusion to integrate materials with different lattice constants. In many cases, devices created using this technique have shown dramatic improvements over those which maintain a single lattice constant. We present device results and characterizations of the fused interface between several groups of materials.

The recent encouraging results on compliant substrates have made them a promising technology for innovative optoelectronic devices and circuits involving lattice mismatched semiconductors. Different from traditional bulk semiconductor substrates, compliant substrates are flexible templates that can accommodate the lattice strain produced during heteroepitaxial growth. This article discusses one special class of compliant substrates, namely twist-bonded compliant substrates. A twist-bonded compliant substrate contains a 30-100A thin layer bonded to a bulk crystal with a high-angle twist boundary at the interface. Experiment has shown that the twist-bonded thin layer functions as a compliant template to absorb the mismatch strain through elastic and plastic deformation. We have fabricated twist-bonded GaAs and Si compliant substrates and grown InGaAs (1.5% mismatch) and InSb (14.7% mismatch) layers on GaAs compliant substrates and Ge layers (4% mismatch) on Si compliant substrates. Cross sectional TEM results have shown a significant reduction in threading dislocation density for all these films. The crosshatch free InGaAs surface indicates that substrate compliance indeed provides a new strain release mechanism than forming dislocation half loops in the heteroepitaxial layers. The photoluminescence data from InGaAs multiquantum- wells also confirm the superior quality of heteroepitaxial layers grown on compliant substrates. Future research is directed to enhancement of our understanding of substrate compliance mechanisms, improvement of processing technology, and demonstration of critical photonic devices on compliant substrates.

Optics has many features, beyond those already exploited in long-distance fiber communications, that make it interesting for interconnections at short distance, including dense optical interconnections directly to silicon integrated circuit chips. Hybrid technologies, such as solder-bump bonding, have recently been successfully used to attach two-dimensional arrays of optical detectors, emitters, and modulators to silicon electronics. Quantum well modulator or self-electro-optic-effect devices (SEEDs), and vertical-cavity surface-emitting lasers (VCSELs) have received particularly strong attention as candidates for the necessary arrayed output devices. This article summarizes the research and prospects in these fields.

The integration of optoelectronic and electronic components from different origins and substrates makes possible many advanced systems in diverse applications in photonics. To this end, various hybrid integration technologies including flip-chip bonding, epitaxial lift-off and direct bonding, substrate removal and “applique” bonding, microrobotic pick and place, and self-assembly methods have been explored. In this paper, we will briefly describe and evaluate these approaches for their applications in optoelectronics and focus on a new micro-assembly technology that can pick, place, and bond many devices of different origins and dimensions simultaneously in a parallel fashion on very large surfaces. We will present some of our preliminary results demonstrating the feasibility of this DNA-assisted micro-assembly technique.

This paper reviews the status of the III-V native oxide formed by steam oxidation of Al(Ga)As and its use in device fabrication. The paper presents progress on understanding the processing chemistry, material properties, and edge-emitting laser diodes, vertical-cavity surface-emitting lasers, optical waveguides, field effect transistors, and other novel device structures. Particular emphasis is placed on its use in vertical-cavity surface-emitting lasers, since to date the impact of the native oxide has been greatest for these devices.

Time division multiplexing has been generally used to increase the total throughput in optical communication systems. However, spatially-parallel optical interconnection technologies will be more effective over short distances (i.e., less than a few hundred meters). This is because data transmission in a parallel format makes system integration simple, reducing the latency of mux/demux functions, and thus results in lower power consumption and lower cost. VCSELs are very important for constructing parallel optical interconnection systems because they can emit a number of broadband optical signals simultaneously. In addition to their one- or two-dimensional structure, they have such advantages as a low cost, low operating current, and surface-normal emission. The surface-normal structure makes it easy to introduce optical input and output (I/O) into LSIs, which are important for constructing high-density optical interconnection systems.¹

The field of optical interconnects has made dramatic advances over the last few years. We define optical interconnects, or optical data communications, as the optically based hardware and protocols for transmitting digital data over distances ranging from approximately one kilometer down to approximately one centimeter. For these distances, electrical cables and interconnects are still very much contenders and so the focus of R&D in optical data communications has been on reducing costs to the range of the electrical interconnects, while demonstrating performance advantages. Smart pixel technology is designed to address interconnects over the shortest distances (a few centimeters). In order for optical interconnects to be cost effective at those distances, dramatic changes must be made in the way a link is constructed. Heterogeneous integration is likely to be one of the technologies which can produce the required cost reductions. The term smart pixel refers to the heterogeneous integration of optical devices (providing the I/O function) with electronic logic onto a single chip or substrate.

In order to provide a context for the description of the objectives and current efforts in the area of VCSEL based smart pixels, this paper will first give a brief description of the major areas of effort in the field of optical data communications, highlighting the role smart pixels are expected to play (Section I). In Section II, the requirements for smart pixel arrays will be discussed. In section III, the unique characteristics of VCSELs which make them promising for application to smart pixels will be discussed. The monolithic integration of VCSELs and MSM photodetectors as a first step in smart pixel integration will be described in Section IV. Potential heterointegration techniques for VCSEL based smart pixels will be discussed in Section V. Section VI will summarize the topics described in this paper.

We review recent results from the hybrid integration of silicon CMOS VLSI reticles with GaAs/AlGaAs Multiple Quantum Well modulators that have been made in conjunction with multi-project hybrid CMOS/Modulator foundry services.

The increased demands for computational power impose heavy requirements on VLSI processing chips. One method to circumvent this problem is the incorporation of a monolithic switching fabric based on opto-electronic circuitry. This added dimension gives an additional degree of freedom to the design engineer. A variety of techniques for heterogeneous integration of AlGaAs opto-electronic devices will be reviewed and their potential for the realization of a VLSI photonic switching fabric will be discuss.