Large Area Masking Techniques For Thin Film Transistor Arrays

T. P. Brody

doi:10.1117/12.955365

8 August 1977 Large Area Masking Techniques For Thin Film Transistor Arrays

T. P. Brody

Author Affiliations +

Proceedings Volume 0100, Developments in Semiconductor Microlithography II; (1977) https://doi.org/10.1117/12.955365
Event: Developments in Semiconductor Microlithography II, 1977, San Jose, United States

Abstract

Thin Film Transistor technology permits the generation. af extremely large area active networks, which currently find their principal application in the Large Scale Integration of solid state, flat panel displays. This paper reviews some of the problems encountered in carrying a design for a large area active matrix through the stages of layout, pattern-generation and stencil mask preparation, the latter being used in the final fabrication of the thin film circuits. An alternative approach, used in thl laboratory, which has great versatility, and which has yielded the largest circuits so far generated (36 in), will also be touched upon.

Citation Download Citation

T. P. Brody "Large Area Masking Techniques For Thin Film Transistor Arrays", Proc. SPIE 0100, Developments in Semiconductor Microlithography II, (8 August 1977); https://doi.org/10.1117/12.955365

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