Paper
15 March 2019 Fabrication and properties of SOI-based planar silicon nanowire arrays
Alexander E. Rogozhin, Andrey V. Miakonkikh, Andrey A. Tatarintsev, Konstantin V. Rudenko
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Proceedings Volume 11022, International Conference on Micro- and Nano-Electronics 2018; 1102222 (2019) https://doi.org/10.1117/12.2522457
Event: The International Conference on Micro- and Nano-Electronics 2018, 2018, Zvenigorod, Russian Federation
Abstract
The fabrication of silicon nanostructures for microelectronic applications is of great interest. We employed two-stage technology of precise anizotropic plasma etching of silicon over e-beam resist and isotropic removal of thermally oxidised defected surface layer of silicon by wet etch to fabricate planar silicon nanowire arrays. Silicon nanowires with diameter of 10-30 nm were obtained. It is simple to get nanowires without oxide or covered with thermal SiO2. Conductivity of obtained silicon nanowire arrays before and after oxidation was measured. It was found that after oxidation and removal of oxide layer conductivity increases dramatically.
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Alexander E. Rogozhin, Andrey V. Miakonkikh, Andrey A. Tatarintsev, and Konstantin V. Rudenko "Fabrication and properties of SOI-based planar silicon nanowire arrays", Proc. SPIE 11022, International Conference on Micro- and Nano-Electronics 2018, 1102222 (15 March 2019); https://doi.org/10.1117/12.2522457
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KEYWORDS
Silicon

Nanowires

Oxidation

Plasma etching

Nanolithography

Wet etching

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