The research of novel comparator design

Tongyuan Liu; Heshun Wang; Chenhao Wu

doi:10.1117/12.2639410

19 October 2022 The research of novel comparator design

Tongyuan Liu, Heshun Wang, Chenhao Wu

Proceedings Volume 12294, 7th International Symposium on Advances in Electrical, Electronics, and Computer Engineering; 122941K (2022) https://doi.org/10.1117/12.2639410
Event: 7th International Symposium on Advances in Electrical, Electronics and Computer Engineering (ISAEECE 2022), 2022, Xishuangbanna, China

Abstract

This paper describes the development of the kickback noise reduction techniques used in comparators and the characteristics of the internal self-adjusting comparator. The Analog-to-Digital Converters are affected by the comparators most, which require further improvement of their basic parts such as the low offset voltage, high speed, and less resolution. With the use of the dynamic bias technique (DB), the comparator’s efficiency is improved. And the floating inverter peramplifier (FIA)technique reduce the increasing delay from the DB. To be the implement of the common-mode feedback (CMFB), an isolated voltage domain is utilized. The number of oscillation cycles (NOC) is put into the voltage-controlled oscillator (VOC) comparator, obtaining the delay correctly.

Citation Download Citation

Tongyuan Liu, Heshun Wang, and Chenhao Wu "The research of novel comparator design", Proc. SPIE 12294, 7th International Symposium on Advances in Electrical, Electronics, and Computer Engineering, 122941K (19 October 2022); https://doi.org/10.1117/12.2639410

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