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21 July 2023 Overview of router architecture in high performance computing
Dejun Shi, Xiaohu Han, Weijian Chen, Hongliang Li
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Proceedings Volume 12717, 3rd International Conference on Artificial Intelligence, Automation, and High-Performance Computing (AIAHPC 2023); 127171R (2023) https://doi.org/10.1117/12.2686172
Event: 3rd International Conference on Artificial Intelligence, Automation, and High-Performance Computing (AIAHPC 2023), 2023, Wuhan, China
Abstract
High Performance Computing (HPC) system has excellent computing power. The router is at the heart of a high-performance interconnection network, which is an important building block of HPC systems. Router architecture is classified into three types: crossbar, hierarchical, and network structures. The crossbar is the fairest, and the most basic component of the router, but it is also the most difficult to extend. Hierarchical structure using the hierarchical scheduling algorithm reduces arbitration complexity. According to the idea of network design, multiple crossbars are connected in a specific topology using integrated circuit technology implemented on a single circuit chip. This paper analyses the characteristics of the three structures and related studies, which have guiding significance for the subsequent high-radix router design. This work also demonstrates the performance of various router architectures in terms of channel throughput and latency.
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Dejun Shi, Xiaohu Han, Weijian Chen, and Hongliang Li "Overview of router architecture in high performance computing", Proc. SPIE 12717, 3rd International Conference on Artificial Intelligence, Automation, and High-Performance Computing (AIAHPC 2023), 127171R (21 July 2023); https://doi.org/10.1117/12.2686172
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KEYWORDS
Network architectures
Computing systems
Design and modelling
Computer architecture
Packet switching
Parallel computing
Switches
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