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10 December 2024 Fast layout pattern matching using spatial indexing
Liuye Meng, Kun Ren, Yongyu Wu, Dawei Gao, Zheju Yan
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Proceedings Volume 13423, Eighth International Workshop on Advanced Patterning Solutions (IWAPS 2024); 1342306 (2024) https://doi.org/10.1117/12.3052326
Event: 8th International Workshop on Advanced Patterning Solutions (IWAPS 2024), 2024, Jiaxing, Zhejiang, China
Abstract
As technology nodes shrink and layout sizes grow, layout pattern matching in lithography defect detection becomes increasingly time-consuming. To address this, we propose a fast layout pattern matching algorithm based on spatial indexing. The method first uses geometric information to locate potential matching regions, then employs spatial indexing to divide the layout into sub-regions, quickly excluding irrelevant areas and improving efficiency. Multithreading and compiler optimizations further enhance speed. Experiments show that our approach achieves a 20- 30x speedup over commercial tools while maintaining 100% accuracy, demonstrating its effectiveness for very large-scale integrated circuit defect detection.
(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.
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Liuye Meng, Kun Ren, Yongyu Wu, Dawei Gao, and Zheju Yan "Fast layout pattern matching using spatial indexing", Proc. SPIE 13423, Eighth International Workshop on Advanced Patterning Solutions (IWAPS 2024), 1342306 (10 December 2024); https://doi.org/10.1117/12.3052326
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KEYWORDS
Lithography
Education and training
Integrated circuits
Semiconductors
Electronic design automation
Optical proximity correction
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