Internal sorting and FPGA

Al Beechick; Steve Casselman; Lynn D. Yarbrough

doi:10.1117/12.255836

21 October 1996 Internal sorting and FPGA

Al Beechick, Steve Casselman, Lynn D. Yarbrough

Proceedings Volume 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic; (1996) https://doi.org/10.1117/12.255836
Event: Photonics East '96, 1996, Boston, MA, United States

Abstract

A new general-purpose internal sorting algorithm, called ABCsort, appears unusually well-suited for FPGA implementation. ABCsort is an O(N) algorithm (worst case, in both time and space) that is, even in software, both much faster than other internal sorts and extraordinarily flexible. ABCsort makes only read accesses to record keys, which facilitates its use in parallel on a shared-memory multiprocessor system. Although it will sort floating-point data, it requires no floating-point arithmetic; the algorithm is independent of data type except for semantics logic which is ideal for implementation in reconfigurable FPGA.

Citation Download Citation

Al Beechick, Steve Casselman, and Lynn D. Yarbrough "Internal sorting and FPGA", Proc. SPIE 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic, (21 October 1996); https://doi.org/10.1117/12.255836

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