Paper
16 September 1996 High-performance variable length decoder with two-word bit-stream segmentation
Michael Bakhmutsky
Author Affiliations +
Abstract
Implementing a high-performance variable length decoder (VLD) presents a major challenge in building an MPEG-2 compliant HDTV video decoder. The capability of the VLD to process macroblocks in real-time can save memory and simplify decoder architectures. For an MPEG-2 main profile, high level compliant HDTV video decoder, this means that the VLD must be able to decode macroblocks at rates exceeding 100 million code words per second. Partitioning the system on the VLD level increases decoder complexity and memory utilization. It is therefore desirable to conceive of a 'one-piece' VLD capable of performing the required operations economically and in real-time. The process of decoding entropy-encoded variable length bit streams is inherently serial in nature. In the VLD, the parallel processing of the bit stream located between the resynchronization points is therefore limited. A unique technique of high-speed parallel bit stream processing is described. This technique is based on a non-traditional two- word bit stream segmentation method optimized for high-speed word length decoding. Applied to the main body of the bit stream, it produces excellent performance results in both consumer and professional profiles of MPEG where decoder partitioning at the VLD level might otherwise be the norm.
© (1996) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Michael Bakhmutsky "High-performance variable length decoder with two-word bit-stream segmentation", Proc. SPIE 2952, Digital Compression Technologies and Systems for Video Communications, (16 September 1996); https://doi.org/10.1117/12.251324
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Cited by 1 scholarly publication.
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KEYWORDS
Clocks

Video

Parallel processing

Computer architecture

Silicon

Image compression

Multiplexers

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