Programmable personality interface for the dynamic infrared scene generator (IRSG2)

James A. Buford Jr.; Scott B. Mobley; Anthony J. Mayhall; William J. Braselton

doi:10.1117/12.316384

13 July 1998 Programmable personality interface for the dynamic infrared scene generator (IRSG2)

James A. Buford Jr., Scott B. Mobley, Anthony J. Mayhall, William J. Braselton

Proceedings Volume 3368, Technologies for Synthetic Environments: Hardware-in-the-Loop Testing III; (1998) https://doi.org/10.1117/12.316384
Event: Aerospace/Defense Sensing and Controls, 1998, Orlando, FL, United States

Abstract

As scene generator platforms begin to rely specifically on commercial off-the-shelf (COTS) hardware and software components, the need for high speed programmable personality interfaces (PPIs) are required for interfacing to Infrared (IR) flight computer/processors and complex IR projectors in the hardware-in-the-loop (HWIL) simulation facilities. Recent technological advances and innovative applications of established technologies are beginning to allow development of cost effective PPIs to interface to COTS scene generators. At the U.S. Army Aviation and Missile Command (AMCOM) Missile Research, Development, and Engineering Center (MRDEC) researchers have developed such a PPI to reside between the AMCOM MRDEC IR Scene Generator (IRSG) and either a missile flight computer or the dynamic Laser Diode Array Projector (LDAP). AMCOM MRDEC has developed several PPIs for the first and second generation IRSGs (IRSG1 and IRSG2), which are based on Silicon Graphics Incorporated (SGI) Onyx and Onyx2 computers with Reality Engine 2 (RE2) and Infinite Reality (IR/IR2) graphics engines. This paper provides an overview of PPIs designed, integrated, tested, and verified at AMCOM MRDEC, specifically the IRSG2's PPI.

Citation Download Citation

James A. Buford Jr., Scott B. Mobley, Anthony J. Mayhall, and William J. Braselton "Programmable personality interface for the dynamic infrared scene generator (IRSG2)", Proc. SPIE 3368, Technologies for Synthetic Environments: Hardware-in-the-Loop Testing III, (13 July 1998); https://doi.org/10.1117/12.316384

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