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This paper describes an automated manufacturability assessment and yield prediction software platform that has been developed, installed and used in a semiconductor manufacturing environment. the system is applied to characterize all incoming new products by extracting a large number of design attributes from their layout. Be checking the similarity to products that have already shown acceptable levels of yield, the risk of starting high volume production for new products is evaluated. The system also accurately predicts product yield on functional-block and layer level which is indispensable for the understanding of product dependent yield loss and rapid yield learning. The system proves to be a very valuable addition to the conventional yield analysis methodologies.
Paul Simon,Kees Veelenturf,Paul van Adrichem,Jeroen de Jong,Stanley Sprij, andWojciech P. Maly
"Layout-based manufacturability assessment and yield prediction methodology", Proc. SPIE 3743, In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing, (27 April 1999); https://doi.org/10.1117/12.346928
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Paul Simon, Kees Veelenturf, Paul van Adrichem, Jeroen de Jong, Stanley Sprij, Wojciech P. Maly, "Layout-based manufacturability assessment and yield prediction methodology," Proc. SPIE 3743, In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing, (27 April 1999); https://doi.org/10.1117/12.346928