Software implementation of MPEG-2 decoder on VLIW media processors

Hiroki Mizosoe; Yoochang Jung; Donglok Kim; Woobin Lee; Yongmin Kim

doi:10.1117/12.375240

29 December 1999 Software implementation of MPEG-2 decoder on VLIW media processors

Hiroki Mizosoe, Yoochang Jung, Donglok Kim, Woobin Lee, Yongmin Kim

Author Affiliations +

Proceedings Volume 3970, Media Processors 2000; (1999) https://doi.org/10.1117/12.375240
Event: Electronic Imaging, 2000, San Jose, CA, United States

Abstract

We have implemented software MPEG-2 decoders on two mediaprocessors, Texas Instruments TMS320C80 and Hitachi/Equator Technologies MAP1000, On the TMS320C80, its small instruction cache and inefficient advanced Digital Signal Processor architecture for bitstream parsing resulted in the performance of about twelve frames per second for 5 Mbit/s MPEG-2 bitstreams on a 50-MHz TMS320C80. On the other hand, the MPEG-2 decoder implemented on a 200-MHz MAP1000 achieved real-time performance in decoding of MPML bitstreams. The implementation details, such as tight loops and data flow, are presented. We also compare the architectural features of the two mediaprocessors in performing the MPEG-2 decoding. The instruction set specifically targeted for multimedia processing, better instruction cache utilization, and an independent variable length decoder are among the advantages of MAP1000.

Citation Download Citation

Hiroki Mizosoe, Yoochang Jung, Donglok Kim, Woobin Lee, and Yongmin Kim "Software implementation of MPEG-2 decoder on VLIW media processors", Proc. SPIE 3970, Media Processors 2000, (29 December 1999); https://doi.org/10.1117/12.375240

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