Low-power realization in main blocks of CMOS APS image sensor

Wei Gao; Edward Shen; Richard I. Hornsey

doi:10.1117/12.628590

13 October 2005 Low-power realization in main blocks of CMOS APS image sensor

Wei Gao, Edward Shen, Richard I. Hornsey

Proceedings Volume 5969, Photonic Applications in Biosensing and Imaging; 596926 (2005) https://doi.org/10.1117/12.628590
Event: Photonics North, 2005, Toronto, Canada

Abstract

This paper addresses the optimization of power at the circuit level in the main blocks of CMOS APS image sensors. A pixel bias current of zero during the readout period is shown to reduce the static power and enhance the settling time of the pixel. A balanced operational transconductance amplifier (OTA) has been demonstrated to be a better candidate as an amplifier when employed in a correlated double sampling (CDS) circuit or as a comparator in an analog-to-digital (A/D) converter, as compared to a Miller two-stage amplifier. Using common-mode feedback (CMFB) in an OTA can further reduce the quiescent power of the amplifier. The low power capability of a CMFB OTA is discussed in this paper by performing a comparison with a conventional OTA using a 0.18 μm technology.

Citation Download Citation

Wei Gao, Edward Shen, and Richard I. Hornsey "Low-power realization in main blocks of CMOS APS image sensor", Proc. SPIE 5969, Photonic Applications in Biosensing and Imaging, 596926 (13 October 2005); https://doi.org/10.1117/12.628590

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