16-bit radix-4 continuous valued digit adder

Mitra Mirhassani; Majid Ahmadi; Graham A. Jullien

doi:10.1117/12.679835

25 August 2006 16-bit radix-4 continuous valued digit adder

Mitra Mirhassani, Majid Ahmadi, Graham A. Jullien

Proceedings Volume 6313, Advanced Signal Processing Algorithms, Architectures, and Implementations XVI; 631303 (2006) https://doi.org/10.1117/12.679835
Event: SPIE Optics + Photonics, 2006, San Diego, California, United States

Abstract

The Continuous Valued Number System (CVNS) is a novel analog digit number system which employs bit level analog residue arithmetic. The information redundancy among the digits, makes it easy to perform the required binary operations in higher radices, and reduces the implementation area and the number of required interconnections. CVNS theory can open up a new approach for performing digital arithmetic with simple and elementary analog elements, such as current comparators and current mirrors, and with arbitrary precision. In this paper we discuss the design of 16-bit radix-4 CVNS adder with controlled precision, and a two operand binary adder designed, in TSMC CMOS 0.18μm technology, is used to illustrate the techniques.

Citation Download Citation

Mitra Mirhassani, Majid Ahmadi, and Graham A. Jullien "16-bit radix-4 continuous valued digit adder", Proc. SPIE 6313, Advanced Signal Processing Algorithms, Architectures, and Implementations XVI, 631303 (25 August 2006); https://doi.org/10.1117/12.679835

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