Architecture for next-generation massively parallel maskless lithography system (MPML2)

Ming-Shing Su; Kuen-Yu Tsai; Yi-Chang Lu; Yu-Hsuan Kuo; Ting-Hang Pei; Jia-Yush Yen

doi:10.1117/12.846444

2 April 2010 Architecture for next-generation massively parallel maskless lithography system (MPML2)

Ming-Shing Su, Kuen-Yu Tsai, Yi-Chang Lu, Yu-Hsuan Kuo, Ting-Hang Pei, Jia-Yush Yen

Author Affiliations +

Proceedings Volume 7637, Alternative Lithographic Technologies II; 76371Q (2010) https://doi.org/10.1117/12.846444
Event: SPIE Advanced Lithography, 2010, San Jose, California, United States

Abstract

Electron-beam lithography is promising for future manufacturing technology because it does not suffer from wavelength limits set by light sources. Since single electron-beam lithography systems have a common problem in throughput, a multi-electron-beam lithography (MEBL) system should be a feasible alternative using the concept of massive parallelism. In this paper, we evaluate the advantages and the disadvantages of different MEBL system architectures, and propose our novel Massively Parallel MaskLess Lithography System, MPML2. MPML2 system is targeting for cost-effective manufacturing at the 32nm node and beyond. The key structure of the proposed system is its beamlet array cells (BACs). Hundreds of BACs are uniformly arranged over the whole wafer area in the proposed system. Each BAC has a data processor and an array of beamlets, and each beamlet consists of an electron-beam source, a source controller, a set of electron lenses, a blanker, a deflector, and an electron detector. These essential parts of beamlets are integrated using MEMS technology, which increases the density of beamlets and reduces the system cost. The data processor in the BAC processes layout information coming off-chamber and dispatches them to the corresponding beamlet to control its ON/OFF status. High manufacturing cost of masks is saved in maskless lithography systems, however, immense mask data are needed to be handled and transmitted. Therefore, data compression technique is applied to reduce required transmission bandwidth. The compression algorithm is fast and efficient so that the real-time decoder can be implemented on-chip. Consequently, the proposed MPML2 can achieve 10 wafers per hour (WPH) throughput for 300mm-wafer systems.

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Ming-Shing Su, Kuen-Yu Tsai, Yi-Chang Lu, Yu-Hsuan Kuo, Ting-Hang Pei, and Jia-Yush Yen "Architecture for next-generation massively parallel maskless lithography system (MPML2)", Proc. SPIE 7637, Alternative Lithographic Technologies II, 76371Q (2 April 2010); https://doi.org/10.1117/12.846444

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