Paper
10 March 2010 Methods for benchmarking photolithography simulators: part V
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Abstract
As the semiconductor industry moves to double patterning solutions for smaller feature sizes, photolithography simulators will be required to model the effects of non-planar film stacks in the lithography process. This presents new computational challenges for modeling the exposure, post-exposure bake (PEB), and development steps. The algorithms are more complex, sometimes requiring very different formulations than in the all-planar film stack case. It is important that the level of accuracy of the models be assessed. For these reasons, we have extended our previous papers in which we proposed standard benchmark problems for computations such as rigorous EMF mask diffraction, optical imaging, PEB, and development [1-4]. In this paper, we evaluate the accuracy of the new PROLITH wafer topography models. The benchmarks presented here pertain to the models (and their associated outputs) most affected by the switch to non-planar film stacks: imaging at the wafer (image intensity in-media) and PEB (blocked polymer concentration). Closed-form solutions are formulated with the same assumptions used in the model implementation. These solutions can be used as an absolute standard and compared against a simulator. The benchmark can then be used to judge the simulator, in particular as it applies to speed vs. accuracy tradeoffs.
© (2010) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Trey Graves, Mark D. Smith, and Sanjay H. Kapasi "Methods for benchmarking photolithography simulators: part V", Proc. SPIE 7640, Optical Microlithography XXIII, 764033 (10 March 2010); https://doi.org/10.1117/12.846376
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KEYWORDS
Performance modeling

Semiconducting wafers

Optical lithography

Oxides

Lithography

Photomasks

Standards development

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