Field-programmable gate array-based hardware architecture for high-speed camera with KAI-0340 CCD image sensor

Hao Wang; Su Yan; Zuofeng Zhou; Jianzhong Cao; Aqi Yan; Linao Tang; Yangjie Lei

doi:10.1117/12.2033013

21 August 2013 Field-programmable gate array-based hardware architecture for high-speed camera with KAI-0340 CCD image sensor

Hao Wang, Su Yan, Zuofeng Zhou, Jianzhong Cao, Aqi Yan, Linao Tang, Yangjie Lei

Author Affiliations +

Proceedings Volume 8908, International Symposium on Photoelectronic Detection and Imaging 2013: Imaging Sensors and Applications; 890811 (2013) https://doi.org/10.1117/12.2033013
Event: ISPDI 2013 - Fifth International Symposium on Photoelectronic Detection and Imaging, 2013, Beijing, China

Abstract

We present a field-programmable gate array (FPGA)-based hardware architecture for high-speed camera which have fast auto-exposure control and colour filter array (CFA) demosaicing. The proposed hardware architecture includes the design of charge coupled devices (CCD) drive circuits, image processing circuits, and power supply circuits. CCD drive circuits transfer the TTL (Transistor-Transistor-Logic) level timing Sequences which is produced by image processing circuits to the timing Sequences under which CCD image sensor can output analog image signals. Image processing circuits convert the analog signals to digital signals which is processing subsequently, and the TTL timing, auto-exposure control, CFA demosaicing, and gamma correction is accomplished in this module. Power supply circuits provide the power for the whole system, which is very important for image quality. Power noises effect image quality directly, and we reduce power noises by hardware way, which is very effective. In this system, the CCD is KAI-0340 which is can output 210 full resolution frame-per-second, and our camera can work outstandingly in this mode. The speed of traditional auto-exposure control algorithms to reach a proper exposure level is so slow that it is necessary to develop a fast auto-exposure control method. We present a new auto-exposure algorithm which is fit high-speed camera. Color demosaicing is critical for digital cameras, because it converts a Bayer sensor mosaic output to a full color image, which determines the output image quality of the camera. Complexity algorithm can acquire high quality but cannot implement in hardware. An low-complexity demosaicing method is presented which can implement in hardware and satisfy the demand of quality. The experiment results are given in this paper in last.

Citation Download Citation

Hao Wang, Su Yan, Zuofeng Zhou, Jianzhong Cao, Aqi Yan, Linao Tang, and Yangjie Lei "Field-programmable gate array-based hardware architecture for high-speed camera with KAI-0340 CCD image sensor", Proc. SPIE 8908, International Symposium on Photoelectronic Detection and Imaging 2013: Imaging Sensors and Applications, 890811 (21 August 2013); https://doi.org/10.1117/12.2033013

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available

Members: $17.00

Non-members: $21.00 ADD TO CART

PROCEEDINGS
8 PAGES

DOWNLOAD PAPER SAVE TO MY LIBRARY

GET CITATION

RIGHTS & PERMISSIONS

Get copyright permission Get copyright permission on Copyright Marketplace

KEYWORDS

Clocks

Charge-coupled devices

Cameras

CCD image sensors

Image processing

Field programmable gate arrays

Digital signal processing

Show All Keywords

Keywords/Phrases

Search In:

Publication Years