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13 June 2022 SEM inspection for logic yield development and control
Timothy Crimmins, Kale Beckwitt
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Proceedings Volume PC12053, Metrology, Inspection, and Process Control XXXVI; PC1205305 (2022) https://doi.org/10.1117/12.2619858
Event: SPIE Advanced Lithography + Patterning, 2022, San Jose, California, United States
Abstract
SEM-based imaging techniques play a strong role in logic semiconductor manufacturing metrology. SEM-based detection techniques have, historically, played a lesser role in inspection, where the objective is defect detection and not imaging. Electron beam inspection (EBI) has seen adoption to monitor systematic defects, with modest area coverage requirements, but it has not been adopted to drive final yield ramp nor for high volume line control due to area coverage challenges at reasonable throughputs. Full logic, yield ramp requires detecting and reducing defect levels from 10^10 per square centimeter levels down to 10^-2. Line control requires measuring enough area to detect excursions from a 10^-2 defects per square centimeter baseline in a factory starting tens of thousands of wafers per month. This first section of this paper reviews the area scaling challenges in detail, stressing the innovation and creativity required to scale SEM as the brute force methods employed by traditional optical inspection systems are not available for EBI. The second section of the paper reviews the design parameter palette available to the EBI developers. The design decisions involving these parameters are mapped to logic yield applications, and the opportunities for future throughput scaling, and more extensive yield ramp and control support, are discussed.
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Timothy Crimmins and Kale Beckwitt "SEM inspection for logic yield development and control", Proc. SPIE PC12053, Metrology, Inspection, and Process Control XXXVI, PC1205305 (13 June 2022); https://doi.org/10.1117/12.2619858
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KEYWORDS
Logic
Inspection
Scanning electron microscopy
Defect detection
Control systems
Metrology
Optical inspection
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