Presentation
19 June 2024 Additive-CMOS compatible fabrication of 3D photonic circuits towards multi-chip integration of hybrid platforms
Adrià Grabulosa i Vallmajó, Xavier Porte, Johnny Moughames, Erik Jung, Kanhaya Sharma, Daniel Brunner
Author Affiliations +
Abstract
Combining the strength of multiple photonic and electronics concepts in one hybrid and multi-chip platform is a promising solution for the diversification of chips for specific computing tasks to boost performance. Using additive and CMOS compatible one- (OPP) and two-photon polymerization (TPP), i.e. flash-TPP printing, we create low-loss 3D integrated photonic chips for scalable and parallel interconnects, which is challenging to realize in 2D. Here, we demonstrate the CMOS compatibility of such technology by merging polymer-based 3D photonic chips with diverse photonic platforms. We interfaced 3D waveguides on top of semiconductor (GaAs) quantum dot micro-lasers, yielding very high emission collection efficiency into the waveguides at cryogenic temperatures (4 K). Furthermore, we integrated our technology with silicon-on-insulator (SOI) platforms by efficiently coupling light from 2D planar SiN waveguides into out-of-plane 3D waveguides. With this, we lay a promising foundation for scalable integration of hybrid photonic and electronic platforms.
Conference Presentation
(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Adrià Grabulosa i Vallmajó, Xavier Porte, Johnny Moughames, Erik Jung, Kanhaya Sharma, and Daniel Brunner "Additive-CMOS compatible fabrication of 3D photonic circuits towards multi-chip integration of hybrid platforms", Proc. SPIE PC13012, Integrated Photonics Platforms III, (19 June 2024); https://doi.org/10.1117/12.3022005
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KEYWORDS
Fabrication

Photonic integrated circuits

Waveguides

3D printing

CMOS technology

Integrated optics

Quantum dot emission

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