Defect reduction for semiconductor memory applications using jet and flash imprint lithography

Zhengmao Ye; Kang Luo; Xiaoming Lu; Brian Fletcher; Weijun Liu; Frank Y. Xu; Dwayne L. LaBrake; Douglas J. Resnick; S. V. Sreenivasan

doi:10.1117/1.JMM.11.3.031404

22 August 2012 Defect reduction for semiconductor memory applications using jet and flash imprint lithography

Zhengmao Ye, Kang Luo, Xiaoming Lu, Brian Fletcher, Weijun Liu, Frank Y. Xu, Dwayne L. LaBrake, Douglas J. Resnick, S. V. Sreenivasan

Author Affiliations +

Journal of Micro/Nanolithography, MEMS, and MOEMS, Vol. 11, Issue 3, 031404 (August 2012). https://doi.org/10.1117/1.JMM.11.3.031404

Abstract

Acceptance of imprint lithography for manufacturing will require demonstration that it can attain defect levels commensurate with the defect specifications of high-end memory devices. Defects occurring during imprinting can generally be broken into two categories; random defects and repeating defects. Examples of random defects include fluid phase imprint defects, such as bubbles, and solid phase imprint defects, such as line collapse. Examples of repeater defects include mask fabrication defects and particle induced defects. Previous studies indicated that soft particles cause nonrepeating defects. Hard particles, on the other hand, can cause either permanent resist plugging or mask damage. In a previous study, two specific defect types were examined; random nonfill defects occurring during the resist filling process and repeater defects caused by interactions with particles on the substrate. We attempted to identify the different types of imprint defect types using a mask with line/space patterns at dimensions as small as 26 nm. An Imprio 500 twenty-wafer per hour development tool was used to study the various defect types. The imprint defect density was reduced nearly four orders of magnitude, down to ~ 4/cm² in a period of two years following the availability of low defect imprint masks at 26-nm half-pitch. This reduction was achieved by identifying the root cause of various defects and then taking the appropriate corrective action.

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Zhengmao Ye, Kang Luo, Xiaoming Lu, Brian Fletcher, Weijun Liu, Frank Y. Xu, Dwayne L. LaBrake, Douglas J. Resnick, and S. V. Sreenivasan "Defect reduction for semiconductor memory applications using jet and flash imprint lithography," Journal of Micro/Nanolithography, MEMS, and MOEMS 11(3), 031404 (22 August 2012). https://doi.org/10.1117/1.JMM.11.3.031404

Published: 22 August 2012

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