Raising the mechanical frequency of atomic force microscopy (AFM) probes to increase the measurement bandwidth has been a long-standing expectation in the field and a technically difficult challenge. Recent advances in cavity optomechanics and in-plane probe designs have yielded significant progress. In situations in which an AFM tip extends a few micrometers from a planar optomechanical resonator, we present an approach to make it overhang from the probe die with precise control of the edge-line position. This fabrication step, which exposes the tip apex to the sample surface, is a prerequisite for any AFM experiment with optomechanical probes. We utilize a combination of saw dicing and time-controlled isotropic plasma etching to undercut the |
1.IntroductionCavity optomechanics1,2 has benefited in recent years from advances in micro and nanofabrication on semiconducting materials. High-quality microcavities on chip with strong optomechanical coupling3 have enabled the measurement of displacements with unprecedented resolution, reaching the range. This paves the way for a wide range of sensing applications in the field of “optomechanical MEMS,” including displacement, mass, force, acceleration, and magnetic field sensors.4–7 In addition, volume manufacturing of these devices can rely on industrial-grade silicon photonic platforms, which are now capable of integrating released micro(electro)mechanical parts with only a few post-processing steps.8,9 Since 2011, several works have demonstrated that optomechanics could significantly impact the field of atomic force microscopy (AFM).10–12 Indeed, an AFM probe is basically a force sensor built from a mechanical resonator. An in-plane design of optomechanical AFM probes has recently achieved a working frequency above 100 MHz, which is two decades higher than the fastest conventional AFM probes, while maintaining the limit of detection well below the Brownian displacement noise for optimal sensitivity.11,13 The optomechanical cavity consists of a silicon ring fabricated from a silicon-on-insulator (SOI) wafer. The ring acts as both the optical cavity and the mechanical resonator. A tip of a few micrometers in length extends from the ring. This in-plane design can benefit from very-large-scale integration (VLSI) fabrication techniques based on silicon photonics.13,14 In AFM experiments, detecting near-field interactions demands exposing the probe tip to the sample surface, necessitating further removal of the substrate material beneath the tip. In the present context, conventional techniques, such as backside lithography and deep reactive ion etching (DRIE),15,16 encounter limitations due to imprecise etch edge positioning, particularly in ensuring the adequate tip overhang from the chip. These limitations primarily stem from the discrepancy between the thickness of the wafer and the tip’s length, which is only a few micrometers. An alternative approach involves mechanical polishing and focus ion beam micromachining,17 but this post-processing method is time-consuming and restricted to individual device chips. To overcome these difficulties, we utilize here a combination of saw dicing and plasma etching. This methodology, which shares similarities with the one presented in Ref. 18, enables precise undercutting of the substrate beneath the tip extending from the optomechanical resonator, without relying on lithography steps. In addition, it facilitates simultaneous fabrication across multiple device chips, enabling their practical use as optomechanical probes in future AFM experiments. 2.Description of the Optomechanical AFM ProbeFigure 1(a) depicts the optomechanical AFM probe. The core of the device consists of a -diameter silicon ring that supports extensional mechanical modes and whispering gallery optical modes. Their strong coupling yields an efficient optomechanical transduction of the mechanical vibration of the ring both in actuation and detection. Input and output laser light is injected and collected through an optical waveguide coupled to the silicon ring. A comprehensive description and optomechanical characterization of the device have been presented elsewhere.11,13 It typically operates at an optical wavelength close to and at a mechanical resonance frequency close to 130 MHz. A tip protrudes from the ring, intended to sense the near-field interaction with the sample during AFM operation. The tip is driven by the mechanical vibration of the ring and oscillates vertically. Its geometry is constrained by several considerations. Indeed, its location at the outer radius of the ring is a source of optical losses by diffraction, and the added mass breaks the symmetry of the mechanical mode. These effects tend to degrade both the optical and mechanical quality factors of the resonator, which in turn is detrimental to the overall performance of the device in terms of the resolution and limit of detection. In consequence, the tip has to be kept small and short. In the current designs, the tip length is or less, and the width at the base is less than 500 nm. As shown in Fig. 1(b), a chip holds the optomechanical resonator and the tip, with the latter overhanging from the chip edge for the purpose of AFM experiments. The fabrication process is schematically shown in Fig. 2. It starts with an 8-in. SOI wafer, with respective thicknesses of 220 nm for the top silicon layer, for the buried oxide layer, and for the handle layer. VLSI clean-room techniques, derived from silicon photonics technologies, are employed for most fabrication steps of the optomechanical core of the device, including lithography and etching of the top silicon layer. High-resolution patterns, such as the optomechanical ring resonator, are defined by variable shape electron beam lithography. For application in AFM, the tip must be exposed to a sample surface during experiments. This necessitates an additional processing step, which involves the controlled removal of the handle layer beneath the tip (step 6 in Fig. 2), before releasing the vibrating ring by etching the buried oxide layer (step 7 in Fig. 2). Figure 3 illustrates the challenge related to such a technological step. As stated before, the constraints of the AFM application have led to a ring diameter of and a tip length of or less, that is, the distance between the central post that anchors the optomechanical ring to the probe chip and the tip apex is maximum. As a consequence, when removing the material beneath the tip, the location of the chip edge must be controlled with a precision much better than . In a practical case, the desired location is chosen at the middle point between the central post and the tip apex, where the acceptable deviation is . Outside these limits, the probe will be ineffective: if the edge line is at or beyond the tip apex, mechanical access to the sample surface is impeded; in the opposite direction, if the edge line exceeds the post, the optomechanical ring is detached from the chip. The acceptable deviation specifies the precision of micromachining to be guaranteed when removing the handle layer under the tip. To fully grasp the challenge, the acceptable deviation in the location of the chip edge of has to be compared with the thickness of the handle layer. This is , that is, 2 orders of magnitude greater than the precision required in the plane of the device. A standard approach to removing the handle layer of an SOI wafer consists of processing the back side of the wafer by lithography and through-wafer DRIE. The buried oxide of the SOI wafer is used as the etch stop layer, thus protecting the optomechanical ring and tip. Even if these techniques are well mastered and if impressive results in terms of aspect ratio and verticality have been obtained,15,16 this remains challenging in our application. Figure 3(c) gives an overview of the difficulty. First, the backside photolithography step requires the alignment of the mask with respect to already-formed frontside patterns. The precision of such a backside alignment, which involves infrared illumination through the -thick silicon handle layer, is typically . Second, DRIE, using the so-called Bosch process based on alternating steps of ion etching and sidewall passivation, enables the manufacturing of structures with a high aspect ratio. In the present case, the sidewall angle is a crucial feature that depends on the fine tuning of the parameters of the etching and passivation steps. It is controlled at best to , which is the specification of most standard DRIE tools. This deviation in verticality translates into an in-plane uncertainty of the etch edge position of when etching through the -thick handle layer. This value exceeds by a factor of 2 the acceptable limit for the location of the chip edge, as previously assessed to . Even for a handle layer thinned down to , which is the minimum for an 8-in. wafer, the edge position would not be accurate enough. In our case, DRIE cannot therefore be used as a reliable and reproducible process step to remove the material under the tip. In Sec. 3, we present another technological approach to make the tip overhang from the probe chip with the required control of the chip edge location. 3.Fabrication of Suspended Tips3.1.OverviewA schematic overview of the procedure is shown in Fig. 4. We first protected the wafer surface against residual debris arising from the subsequent dicing steps by depositing a thick protective layer of photoresist (AZ4562, ). From the 8-in. wafer, we cut by coarse saw-dicing a typical sample containing 12 optomechanical AFM probes. We proceeded with a second step of fine saw-dicing to bring the tip apices of the probes to the edge of the sample. Successful dicing results in (i) a good alignment accuracy, i.e., a dice line parallel to the 12 tip apices; (ii) a distance of between the dice line and the posts; and (iii) a minimal chipping of the silicon. Note that, at this stage, we do not seek to minimize the distance between the dice line and the apices so that the residual chipping is further smoothed out by the isotropic etch of silicon. Following this dicing step, we removed the protective photoresist layer using acetone and isopropyl alcohol rinse to wash away any debris from the dicing. The sample was further cleaned with oxygen plasma ( flow: , power: 1000 W, 5 min). The next step was the isotropic etching of the silicon handle layer, which decreases the distance between the sample edge and the tips. The etching was stopped when the silicon material under the tip was removed at the desired location between the central post of the optomechanical resonator and the tip apex. Note that, at this stage, the probe structure remains protected by the buried oxide layer and an upper silicon oxide layer deposited on the wafer during the fabrication process. Figure 4(d) shows the device after the removal of the silicon handle layer under the tip. The final step consisted of releasing the optomechanical ring resonator and the tip by etching the silicon oxide. This was realized by a combination of time-controlled wet and vapor hydrofluoric (HF) etching. Sections 3.2 and 3.3 detail the steps of saw dicing and isotropic plasma etching. 3.2.Saw Dicing ProcedureThe first requirement of the fine dicing in Fig. 4(b) is minimizing the silicon chipping to achieve a straight die edge line at the end of the process. Low cutting damages are obtained by the optimal choice of the blade and the dicer settings. Our dicer tool is a DAD321 from Disco, and we selected the 2.187-10A 30RU3 blade. Optimal results were obtained with the following parameters: a blade rotational speed of 30,000 rpm, a feed speed of , and a water cooling flow. The cutting depth was set so that the blade extended beyond the thickness of the wafer being cut. We also regularly adjusted the blade with a laser during cutting to compensate for wear and ensure precise control over the desired depth. The second requirement is the precise control of the parallelism and the location of the dice line. This is achieved by the calibration of the tool, including hairline adjustment to compensate for the blade width, and the careful theta alignment of the sample with respect to the probe tip apices. 3.3.Isotropic Plasma Etching ProcedureFollowing the dicing and cleaning steps, the sample containing 12 optomechanical AFM probes was laid front-side down on a 4-in. carrier silicon wafer and secured using silicon pieces and Kapton tape, as illustrated in Fig. 5. The top surface of the sample remained protected by a 400-nm silicon oxide layer deposited during the fabrication process. The reactive ion etching tool is an Alcatel AMS4200 producing inductively coupled plasma (ICP). The recipe is based on gas with a flow rate of 700 sccm. The base pressure of the tool was , and the pressure was increased to 45 mTorr during the etching. RIE is a combination of chemical etching by fluoride ions and physical etching due to ion bombardment. To achieve isotropic etching, we favored the chemical process against the physical one by applying a high RF power to the ICP coil and a low one on the plate, 2800 W and 85 W, respectively. Under these conditions, we typically obtained vertical and lateral etch rates of silicon of 4.8 and , respectively, i.e., a nearly isotropic etching. The etching of the silicon handle layer of the sample was performed in two steps. Following a careful optical observation of the sample to obtain an accurate measurement of the distance between the dice line and the apices, a first RIE etching was performed. The etching time was calculated to remove 60% of the material to etch, based on the typical etch rates. A second optical observation of the sample was then performed to deduce the actual lateral etch rate and to measure the remaining amount of silicon to etch. These data fed the second step of plasma etching with the process time. An optical inspection finally allowed us to check the completion of the etching process and the position of the chip edge line with respect to the tip apices. 4.ResultsFigure 6 illustrates the fabrication of suspended tips using the method described in Sec. 3. Device #11 of the sample is displayed as an example. Table 1 summarizes the relevant parameters measured on the 12 devices of the sample at the main steps of the fabrication process. Table 1Distance from the central post to the chip edge and edge line roughness at each process step for the 12 probes of the sample. The roughness corresponds to the peak-to-peak measurement of edge line irregularities. Measurements were carried out by optical microscopy. The measurement uncertainty is a maximum of 0.5 μm.
4.1.Saw DicingFigure 6(a) displays a typical result obtained after the fine saw-dicing step depicted in Fig. 4(b). The distance between the central post of the ring resonator and the dice line is . The roughness of the edge line is peak to peak, confirming that low cutting damages are achieved due to the optimized blade and dicer settings. As shown in Table 1, across the 12 devices of the sample, the average distance between the central posts and the sample edge is with a standard deviation of . This indicates optimal control of the saw line parallelism during dicing. Cutting damages and silicon chipping were also successfully minimized along the 4-cm long sample, with an average edge line roughness of (standard deviation: ). 4.2.Isotropic Plasma EtchingFrom the observations following the saw dicing step, we determined that of the silicon handle layer had to be laterally etched to position the chip edge midway between the central posts of the optomechanical rings and the tip apices. The first etching step aimed to remove of the material, i.e., . Figure 6(b) shows the result of this step: the distance from the central post to the edge was reduced to , resulting from a lateral etching of of silicon. Notably, the edge line roughness was significantly reduced from 4.8 to after etching. This smoothing effect, attributed to the chemical nature of isotropic plasma etching, was consistent across all 12 devices. A noteworthy observation emerged from the systematic inspection of the 12 devices: although the average post-to-edge distance was very uniform for 10 of the 12 devices (), devices #6 and #7 exhibited greater post-to-edge distances by . This discrepancy correlates with the presence of the silicon piece securing the sample on the carrier wafer (indicated by the red arrow in Fig. 5) near these two devices. The likely explanation is a limited exposure of the sample edge to the plasma, resulting in a local reduction of the etch rate due to the silicon piece. Based on these observations, the remaining etching time was calculated, and the second etching step was performed. This process was successful for 10 out of 12 devices (yielding an 83% success rate). As reported in Table 1, the post-to-edge distance varies from 3.6 to for these 10 devices (average: , standard deviation: ), indicating that the sample edge is positioned between the central post of the ring and the tip apex. The edge line roughness remained unchanged. However, devices #6 and #7 failed to reach the target distance due to the previously mentioned issue with the silicon piece, which caused a decreased etching rate for these devices. The plasma etching recipe is selective toward silicon oxide. Consequently, the structures of the devices, patterned from the top silicon layer, were protected by the buried and backend silicon oxide layers, as depicted in Fig. 4(c). Together, these layers formed the residual oxide layer shown in Figs. 6(b) and 6(c), which extends from the edge of the sample. Despite having a 50:1 aspect ratio (length: ; thickness: ), this oxide layer remained stable and resistant to sample manipulation. It was etched during the subsequent step of device release. 4.3.Device ReleasingThe devices were released using a conventional time-controlled etching process with HF acid to remove the silicon oxide that encapsulates the entire device [see Fig. 7(a)]. The first step, the “prerelease,” consists of removing the backend oxide, which was deposited on the silicon structure on the sample surface as a protective layer. It involves a combination of HF and ethanol vapors at reduced pressure to isotropically etch the backend oxide at a slow rate () with high selectivity. The etching of the backend oxide leaves some residues on the sample surface due to the chemical precursors used for deposition. At this stage, the device remains attached to the buried oxide underneath to prevent damage during the residue removal step [see Fig. 7(b)], which can cause severe mechanical disturbances. This step consists of several dump-and-rinse cycles with deionized water, followed by centrifugal drying. The prerelease requires between 2 and 3 cycles as described above to finely remove the -thick backend oxide () and, above all, the associated residues. The second step, the “main release,” consists of etching the 1000-nm-thick buried oxide of the SOI substrate beneath the optomechanical structure, which is a residue-free thermal oxide, to fully release the mechanical structure [see Fig. 7(c)]. The process is based on mixing HF and ethanol vapors and is carried out at a faster rate (). The sample is finally cleaned by pumping and purging cycles of . This process resulted in released structures, as illustrated in Fig. 8. Observation showed that the tip was protruding from the edge of the chip. The spokes, ring, and tip are free to move and vibrate relative to the substrate. No visible stiction occurred between the ring and the substrate nor between the ring and the optical waveguide. Figure 9 presents typical optomechanical characterizations obtained with released optomechanical devices. Optical coupling was achieved by aligning optical fibers with the on-chip grating couplers. The bell shape in the optical spectrum in Fig. 9(a) corresponds to the transmission profile of the grating couplers. Several optical modes of the optomechanical ring are visible at wavelengths close to as sharp dips in transmission, exhibiting optical quality factors between 10,000 and 20,000 and contrasts between 40% and 90%. In Fig. 9(b), the laser wavelength was tuned to an optical mode, and the power spectral density (PSD) of the transmitted optical signal was analyzed in the frequency range of the ring’s mechanical resonance. A displacement noise is clearly observed as a Lorentzian peak, corresponding to the Brownian motion of the mechanical mode caused by thermal fluctuations, indicating that the ring is free to vibrate. The resonance frequency is 130.61 MHz, in very good agreement with the design, and the quality factor is 880 in air. The PSD in Fig. 9(b) is calibrated using a standard method based on the calculation of Brownian motion,19 indicating a resolution limited by the noise floor of and a displacement noise of the device’s tip at a resonance of . 5.ConclusionIn this study, we presented a series of technological steps to fabricate nanotips overhanging from a chip edge by a few micrometers in a controlled manner. The process utilizes saw dicing and reactive ion etching, which are standard tools available in most cleanroom facilities. It does not require any lithography or alignment steps. Through optimization of process parameters, we achieved excellent reproducibility and were able to position the chip edge with a precision of less than while achieving an edge line roughness of less than . Starting with a -thick wafer, such precision would be challenging to attain using methods involving backside lithography and deep reactive ion etching of silicon. Although samples were not processed at the wafer scale, our method enabled the simultaneous treatment of 12 devices contained within a area, and we foresee the potential to increase the throughput further. We applied this technique to optomechanical devices comprising nanotips protruding from ring resonators for the development of very-high-frequency atomic force microscopy probes. The standard deviation of the edge line position is . We thus envision that the technique could be applied in the future to smaller optomechanical rings with a diameter of , which requires positioning the chip edge with a precision of . Furthermore, this approach can be extended to various other silicon devices resulting from planar fabrication, including micro/nano-electromechanical systems, and optical devices. It is worth noting that the technique is particularly suited for the realization of sensors. Indeed, in many cases, it is crucial to enable and maximize the exposure of the sensitive element to the environment to optimize interaction with the measured quantity. Therefore, our method provides an effective solution to this requirement, especially when the device dimensions are reduced to a few micrometers. DisclosuresThe authors declare that there are no conflicts of interest regarding the publication of this article. Code and Data AvailabilityThe data that support the findings of this study are available from the corresponding author upon reasonable request. AcknowledgmentsThis work was supported by the French National Research Agency (ANR) under the research project HERMES (Grant No. ANR-21-CE42-0031) and the RENATECH French national technological network. A. Marković acknowledges support from the French National Research Agency (ANR) under the research project zerⓞuate (Grant No. ANR-19-CE24-0013). ReferencesI. Favero and K. Karrai,
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BiographyAleksandra Marković obtained her bachelor’s degree in electrical engineering from TU Vienna, Austria, in 2016 and her master’s degree in microengineering from EPFL, Switzerland, in 2019. After spending 1 year at Harvard University as a visiting student, she joined LAAS-CNRS as a PhD candidate in 2021. She is currently working on ultra-low-power logic gates based on capacitive MEMS devices operating in an adiabatic regime. |