Paper
11 May 2009 Investigation of the development process for high-precision patterning
Junichi Watanabe, Tsukasa Yamazaki, Masahito Tanabe, Toru Komizo, Amy E. Zweber, Adam C. Smith
Author Affiliations +
Abstract
Photomask feature size has decreased in accordance with constant downscaling of semiconductor device size with generation changes in every 2-3 years, as in the ITRS Roadmap. However, since exposure wavelength has been unable to keep its pace with decreasing feature size, resolution enhancement techniques have been used to bring the generation changes in photomask technologies. A typical resolution enhancement technique of using sub-resolution assist features (SRAF) requires patterning of small features and that increases difficulties in mask manufacturing. Under such circumstances, we are presenting a study focusing on EB-resist development in the manufacturing process. In this paper, we study and report development methods aiming to improve develop loading effect and resolution limit.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Junichi Watanabe, Tsukasa Yamazaki, Masahito Tanabe, Toru Komizo, Amy E. Zweber, and Adam C. Smith "Investigation of the development process for high-precision patterning", Proc. SPIE 7379, Photomask and Next-Generation Lithography Mask Technology XVI, 73790B (11 May 2009); https://doi.org/10.1117/12.824252
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CITATIONS
Cited by 5 scholarly publications.
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KEYWORDS
Standards development

SRAF

Optical lithography

Photomasks

Manufacturing

Resolution enhancement technologies

Critical dimension metrology

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