The photosensitivity of silicon is inherently very low in the visible electromagnetic spectrum, and it drops rapidly beyond 800 nm in near-infrared wavelengths. We have experimentally demonstrated a technique utilizing photon-trapping surface structures to show a prodigious improvement of photoabsorption in 1-μm-thin silicon, surpassing the inherent absorption efficiency of gallium arsenide for a broad spectrum. The photon-trapping structures allow the bending of normally incident light by almost 90 deg to transform into laterally propagating modes along the silicon plane. Consequently, the propagation length of light increases, contributing to more than one order of magnitude improvement in absorption efficiency in photodetectors. This high-absorption phenomenon is explained by finite-difference time-domain analysis, where we show an enhanced photon density of states while substantially reducing the optical group velocity of light compared to silicon without photon-trapping structures, leading to significantly enhanced light–matter interactions. Our simulations also predict an enhanced absorption efficiency of photodetectors designed using 30- and 100-nm silicon thin films that are compatible with CMOS electronics. Despite a very thin absorption layer, such photon-trapping structures can enable high-efficiency and high-speed photodetectors needed in ultrafast computer networks, data communication, and imaging systems, with the potential to revolutionize on-chip logic and optoelectronic integration.
We present a germanium “Ge-on-Si” CMOS image sensor with backside illumination for the near-infrared (NIR) electromagnetic waves (wavelength range 300 to 1700 nm) detection essential for optical sensor technology. The microholes help to enhance the optical efficiency and extend the range to the 1.7-μm wavelength. We demonstrate an optimization for the width and depth of the microholes for maximal absorption in the NIR. We show a reduction in the crosstalk by employing thin SiO2 deep trench isolation in between the pixels. Finally, we show a 26 to 50% reduction in the device capacitance with the introduction of a microhole. Such CMOS-compatible Ge-on-Si sensors will enable high-density, ultrafast, and efficient NIR imaging.
Controlling light penetration depth in Avalanche Photodiodes (APDs) and Single Photon Avalanche Diodes (SPADs) play a major role in achieving high multiplication gain by delivering light near the multiplication region where the electric field is the strongest. Such control in the penetration depth for a particular wavelength of light has been previously demonstrated using integrated photon-trapping nanostructures. In this paper, we show that an optimized periodic nanostructure design can control the penetration depth for a wide range of visible and near-infrared wavelengths simultaneously. A conventional silicon APD structure suffers from high photocarrier loss due to recombination for shorter wavelengths as they are absorbed near the surface region, while silicon has low absorption efficiency for longer wavelengths. This optimized nanostructure design allows shorter wavelengths of light to penetrate deeper into the device, circumventing recombination sites while trapping the longer wavelengths in the thin silicon device by bending the vertically propagating light into horizontal modes. This manipulation of penetration depth improves the absorption in the device, increasing light sensitivity while nanostructures reduce the reflectance from the top surface. While delivery of light near the multiplication region reduces the photogenerated carrier loss and shortens transit time, leading to high multiplication gain in APDs and SPADs over a wide spectral range. These high gain APDs and SPADs will find their potential applications in Time-Of-Flight Positron Emission Tomography (TOF-PET), Fluorescence Lifetime Imaging Microscopy (FLIM), and pulse oximetry where high detection efficiency and high gain-bandwidth is required over a multitude of wavelengths.
Optical spectrometers are widely used scientific equipment with many applications involving material characterization, chemical analysis, disease diagnostics, surveillance, etc. Emerging applications in biomedical and communication fields have boosted the research in the miniaturization of spectrometers. Recently, reconstruction-based spectrometers have gained popularity for their compact size, easy maneuverability, and versatile utilities. These devices exploit the superior computational capabilities of recent computers to reconstruct hyperspectral images using detectors with distinct responsivity to different wavelengths. In this paper, we propose a CMOS compatible reconstruction-based on-chip spectrometer pixels capable of spectrally resolving the visible spectrum with 1 nm spectral resolution maintaining high accuracy (<95 %) and low footprint (8 μm × 8 μm), all without the use of any additional filters. A single spectrometer pixel is formed by an array of silicon photodiodes, each having a distinct absorption spectrum due to their integrated nanostructures, this allows us to computationally reconstruct the hyperspectral image. To achieve distinct responsivity, we utilize random photon-trapping nanostructures per photodiode with different dimensions and shapes that modify the coupling of light at different wavelengths. This also reduces the spectrometer pixel footprint (comparable to conventional camera pixels), thus improving spatial resolution. Moreover, deep trench isolation (DTI) reduces the crosstalk between adjacent photodiodes. This miniaturized spectrometer can be utilized for real-time in-situ biomedical applications such as Fluorescence Lifetime Imaging Microscopy (FLIM), pulse oximetry, disease diagnostics, and surgical guidance.
The gain in Avalanche Photodiodes (APDs) and Single Photon Avalanche Diodes (SPADs) is dependent on the probability of photo-generated carriers to trigger an avalanche process, which is correlated to the depth where a photon is absorbed by the photodiode. For silicon photodiodes, most of the photons with wavelengths in the visible spectrum are absorbed near the surface in the highly doped contact regions where the recombination rate is high. Thus, they do not contribute significantly to the avalanche multiplication process. By integrating photon-trapping nanostructures, we facilitate deeper penetration of photons into the devices, enhancing light absorption to generate more carriers that can trigger the avalanche process. This improves the gain-bandwidth of silicon APDs and SPADs significantly. Photon-trapping nanoholes can reduce the thickness of silicon without compromising its quantum efficiency, while a perforated surface reduces the device capacitance improving the bandwidth. Therefore, the manipulation of light penetration depth using photon-trapping nanoholes leads to ultrafast high-gain photodetectors capable of detecting faint light signals particularly useful for low light applications such as fluorescent lifetime imaging microscopy and time-of-flight positron emission tomography.
Improving the time resolution and sensitivity of Silicon-based Single Photon Avalanche Photodetectors (Si-SPAD) across the entire visible spectrum is critical to improve image quality in biomedical imaging applications such as positron emission tomography or fluorescence lifetime imaging. This work reports on the feasibility of manipulating the penetration depth of photons with 450 nm wavelengths to enhance absorption in Si-SPAD by means of photon trapping structures. Optical-electrical simulations suggest light can be directed towards critical regions of the semiconductor increasing the absorption from 54 to 90% with only 1.2μm of silicon and enhancing the probability of avalanche by electrons that leads to higher multiplication gain and speed of operation.
The performance of mid- and long-wavelength infrared (IR) detectors is still restricted with the dark current characteristics and associated noise behavior. In this work, we propose reducing the dark current and related noise of the IR detectors to elevate high operating temperature and improve the detector quantum efficiency (QE), by using a thin absorption layer of IR absorbing materials like lead selenide (PbSe) and mercury cadmium telluride (HgCdTe). A photon bending and trapping mechanism based on integrated micro/nanoscale holes was employed to ensure high quantum efficiency despite using a thin absorbing layer. Using finite-difference time-domain (FDTD) method, the effect of embedded hole arrays on the optical absorption enhancement of ultra-thin PbSe and HgCdTe has been investigated. The calculated optical absorptions in ultra-thin IR structures without holes were compared with that of similar structures embedded with hole arrays. The optical absorption in 2 μm thick PbSe film without holes is less than 5% for 3-5 μm mid-IR wavelengths. Although applying conventional anti-reflecting (AR) coatings leads to a slightly higher absorption, it can cause higher dark current due to increased surface traps. Integration of hole arrays in 2 μm thick PbSe film has shown a significant optical absorption enhancement, up to 20% at 4.5 μm wavelength. This is equivalent to more than 2- and 4-folds' enhancement compared to a 2 μm thick flat-surface structure with AR and without AR, respectively. In addition, embedding the hole arrays in 1.2 μm thick HgCdTe IR films enhances the optical absorption up to 75% at 4.5 μm, which is more than 4 times higher than that in HgCdTe structure without holes. Additionally, the optical absorption in 1.2 μm thick HgCdTe film with periodic array of photon-trapping micro-holes enhances to 27% at 10 μm, long-IR wavelength. This is more that 3 times higher than that in HgCdTe films without holes. Our work revealed that the embedding hole arrays not only enhances the optical absorption in IR ultra-thin structures but also can reduce that material filling ratio to ~50%, which leads to a lower dark current, ensuring higher temperature operation of the IR detectors.
Crystalline silicon (c-Si) remains the most commonly used material for photovoltaic (PV) cells in the current commercial solar cells market. However, current technology requires “thick” silicon due to the relative weak absorption of Si in the solar spectrum. We demonstrate several CMOS compatible fabrication techniques including dry etch, wet etch and their combination to create different photon trapping micro/nanostructures on very thin c-silicon surface for light harvesting of PVs. Both, the simulation and experimental results show that these photon trapping structures are responsible for the enhancement of the visible light absorption which leads to improved efficiency of the PVs. Different designs of micro/nanostructures via different fabrication techniques are correlated with the efficiencies of the PVs. Our method can also drastically reduce the thickness of the c-Si PVs, and has great potential to reduce the cost, and lead to highly efficient and flexible PVs.
Nanostructures allow broad spectrum and near-unity optical absorption and contributed to high performance low-cost Si photovoltaic devices. However, the efficiency is only a few percent higher than a conventional Si solar cell with thicker absorption layers. For high speed surface illuminated photodiodes, the thickness of the absorption layer is critical for short transit time and RC time. Recently a CMOS-compatible micro/nanohole silicon (Si) photodiode (PD) with more than 20 Gb/s data rate and with 52 % quantum efficiency (QE) at 850 nm was demonstrated. The achieved QE is over 400% higher than a similar Si PD with the same thickness but without absorption enhancement microstructure holes. The micro/nanoholes increases the QE by photon trapping, slow wave effects and generate a collective assemble of modes that radiate laterally, resulting in absorption enhancement and therefore increase in QE. Such Si PDs can be further designed to enhance the bandwidth (BW) of the PDs by reducing the device capacitance with etched holes in the pin junction. Here we present the BW and QE of Si PDs achievable with micro/nanoholes based on a combination of empirical evidence and device modeling. Higher than 50 Gb/s data rate with greater than 40% QE at 850 nm is conceivable in transceivers designed with such Si PDs that are integrated with photon trapping micro and nanostructures. By monolithic integration with CMOS/BiCMOS integrated circuits such as transimpedance amplifiers, equalizers, limiting amplifiers and other application specific integrated circuits (ASIC), the data rate can be increased to more than 50 Gb/s.
High-aspect ratio semiconductor pillar- and hole-based structures are being investigated for photovoltaics, energy harvesting devices, transistors, and sensors. The fabrication of pillars and holes frequently involves top-down fabrication (such as dry etching) of semiconductors. Such a process contributes to different types of crystalline defects including vacancies, interstitials, dislocations, stacking faults, surface roughness, impurities, and charging effects. These defects contribute to degraded device characteristics impacting detection sensitivity, energy conversion efficiency, etc. In this presentation, we review dry-etched semiconductor devices and demonstrate several possible methods to inhibit device degradation induced by surface damage. These methods include hydrogen passivation, the growth of oxide passivating thin films using wet furnace growth, and low-ion energy etching. These methods contributed to a leakage current reduction by as much as four orders of magnitude.
We report the use of sol-gel method at room ambient to grow nanoscale thin film of Ga2O3 on Si surface for both surface
passivation and gate dielectric. The admittance measurements were carried out in the frequency range of 20 kHz-1 MHz
at room temperature. Voltage dependent profile of interfacial trap density (Dit) was obtained by using low and high
frequency capacitance method. The capacitance (C)-voltage (V) analyses show that the structures have a low interfacial
trap density (Dit) of 1x1012 cm-2eV-1. The Ga2O3 thin film synthesized via sol-gel method directly on devices to function
as a gate dielectric film is found to be very effective. We also present our experimental results for a number of gate
dielectric and device passivation applications.
Efficient light harvesting in a thin layer of crystalline Si can be realized by implementing nanoscale pillars and holes to the device structure. The major drawback of the pillars and holes based photovoltaic devices is high surface to volume ratio, contributing to an increase in surface recombination rate of the photo-generated carriers. The common techniques used in pillars/holes fabrication such as dry etching make the surface even worse by bombarding it with high energy ions. Therefore, such damaged surfaces of high aspect ratio structures need to be effectively passivated. In this study, we demonstrate a hole based thin crystalline Si photovoltaic device with enhanced open circuit voltage and short circuit current after a successful surface passivation process through a wet oxidation. In addition, the effect of passivation layer fabricated by rapid thermal oxide growth on photo response is investigated. A successful fabrication of thin crystalline Si solar cells can lead to the applications of ultra-thin, highly efficient, flexible and wearable energy sources.
In this work, pure and IIIA element doped ZnO thin films were grown on p type silicon (Si) with (100) orientated surface by sol-gel method, and were characterized for comparing their electrical characteristics. The heterojunction parameters were obtained from the current-voltage (I-V) and capacitance-voltage (C-V) characteristics at room temperature. The ideality factor (n), saturation current (Io) and junction resistance of ZnO/p-Si heterojunction for both pure and doped (with Al or In) cases were determined by using different methods at room ambient. Other electrical parameters such as Fermi energy level (EF), barrier height (ΦB), acceptor concentration (Na), built-in potential (Φi) and voltage dependence of surface states (Nss) profile were obtained from the C-V measurements. The results reveal that doping ZnO with IIIA (Al or In) elements to fabricate n-ZnO/p-Si heterojunction can result in high performance diode characteristics.
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