High-NA EUV technology enables cost-effective patterning below the 5nm node. The integration is simpler but still requires multiple innovations. Thinner resists are needed for single-patterning enablement. The decrease in thickness poses a challenge for traditional metrology and inspection systems like OCD or CD-SEM, which lose sensitivity due to diminishing interaction volume. The reverse is true for Scanning Probe Microscopy, which excels in the low-height patterning regime. Here we discuss patterning metrology and introduce defect inspection / review applications for High-NA EUV patterning using a high-throughput SPM.
Improved resolution of the High-NA EUV technology comes with thinner photoresist and smaller aspect-ratio requirements. Trade-offs include more stringent process control needs for resist loss and line roughness. Traditional metrologies like OCD or CD-SEM lose sensitivity due to diminishing interaction volume. A metrology technique that thrives in this regime is Scanning Probe Microscopy: thinner resist allows for higher scanning speed, and smaller aspect ratio for higher measurement accuracy. Here we propose a High-Throughput SPM technique as key enabler for High-NA EUV process control. Detailed, high-density full wafer measurements of resist loss, CD and roughness are enabled by a high-throughput, 4-head SPM toolset, and compared for different resist thicknesses down to 10nm. Sampling schemes consistent with scanner throughput are considered.
The performance of image-based and diffraction-based overlay metrology depends on the quality of optical signal returning from the buried mark. A desirable class of hard mask materials are the metal-based hard masks. The challenge with metal-based hard masks is that they are typically opaque in the visible range. To enable overlay metrology, a costly process integration scheme replaces the opaque material over the overlay target, while another detects residual topography propagating through the film. Here we discuss the progress towards the fully automated Scanning Probe Metrology tool that combines surface and subsurface channel information in a single image to measure overlay through opaque films.
The current state of the art ADI overlay metrology relies on multi-wavelength uDBO techniques. Combining the wavelengths results in better robustness against process effects like process induced grating asymmetries. Overlay information is extracted in the image plane by determining the intensity asymmetry in the 1st order diffraction signals of two grating pairs with an intentional shift (bias). In this paper we discuss a next evolution in DBO targets where a target is created with multiple biases. These so called cDBO (continuous bias DBO) targets have a slightly different pitch between top and bottom grating, which has the effect of having a different bias values along the grating length and are complimentary to the uDBO technology. Where for the uDBO target, the diffraction results in a uniform Intensity pattern that carries the Overlay signal, for cDBO, an oscillating intensity pattern occurs, and the Overlay information is now captured in the phase of that pattern. Phase-based Overlay has an improved, intrinsic robustness over intensity-based overlay and can reduce the need for multi-wavelength techniques in several cases. Results on memory technology wafers confirm that the swing-curve (through-wavelength) behavior is indeed more stable for phase-based DBO target and that for accurate Overlay, this target can be qualified with a single wavelength recipe (compared to the uDBO dual wavelength recipe). In this paper, both initial results on a Micron feasibility wafer will be shown as well as demonstrated capability in a production environment.
Atomic Force Microscopy (AFM) topographic imaging has enabled semiconductor manufacturing research and development since early '90s. Unique strength over competing metrology techniques includes the potential for undistorted, local high resolution information. Comparatively slow throughput has traditionally limited high volume manufacturing (HVM) deployment. Here, we discuss the advantages of a multi-head AFM system with miniaturized high-speed SPMs working in parallel. In addition, we extend traditional AFM techniques to selective imaging and metrology of subsurface 3D structures and show a path to enabling Overlay metrology through opaque hard mask layers.
Advanced technology nodes, 10 nm and beyond, employing multipatterning techniques for pitch reduction pose new process and metrology challenges in maintaining consistent positioning of structural features. A self-aligned quadruple patterning (SAQP) process is used to create the fins in FinFET devices with pitch values well below optical lithography limits. The SAQP process bears the compounding effects from successive reactive ion etch and spacer depositions. These processes induce a shift in the pitch value from one fin compared to another neighboring fin. This is known as pitch walking. Pitch walking affects device performance as well as later processes, which work on an assumption that there is consistent spacing between fins. In SAQP, there are three pitch walking parameters of interest, each linked to specific process steps in the flow. These pitch walking parameters are difficult to discriminate at a specific process step by singular evaluation technique or even with reference metrology, such as transmission electron microscopy. We will utilize a virtual reference to generate a scatterometry model to measure pitch walk for SAQP process flow.
Self-Aligned Quadruple Patterning (SAQP) is a promising technique extending the 193-nm lithography to manufacture structures that are 20nm half pitch or smaller. This process adopts multiple sidewall spacer image transfers to split a rather relaxed design into a quarter of its original pitch. Due to the number of multiple process steps required for the pitch splitting in SAQP, the process error propagates through each deposition and etch, and accumulates at the final step into structure variations, such as pitch walk and poor critical dimension uniformity (CDU). They can further affect the downstream processes and lower the yield. The impact of this error propagation becomes significant for advanced technology nodes when the process specifications of device design CD requirements are at nanometer scale. Therefore, semiconductor manufacturing demands strict in-line process control to ensure a high process yield and improved performance, which must rely on precise measurements to enable corrective actions and quick decision making for process development. This work aims to provide a comprehensive metrology solution for SAQP.
During SAQP process development, the challenges in conventional in-line metrology techniques start to surface. For instance, critical-dimension scanning electron microscopy (CDSEM) is commonly the first choice for CD and pitch variation control. However, it is found that the high aspect ratio at mandrel level processes and the trench variations after etch prevent the tool from extracting the true bottom edges of the structure in order to report the position shift. On the other hand, while the complex shape and variations can be captured with scatterometry, or optical CD (OCD), the asymmetric features, such as pitch walk, show low sensitivity with strong correlations in scatterometry. X-ray diffraction (XRD) is known to provide useful direct measurements of the pitch walk in crystalline arrays, yet the data analysis is influenced by the incoming geometry and must be used carefully.
A successful implementation of SAQP process control for yield improvement requires the metrology issues to be addressed. By optimizing the measurement parameters and beam configurations, CDSEM measurements distinguish each of the spaces corresponding to the upstream mandrel processes and report their CDs separately to feed back to the process team for the next development cycle. We also utilize the unique capability in scatterometry to measure the structure details in-line and implement a “predictive” process control, which shows a good correlation between the “predictive” measurement and the cross-sections from our design of experiments (DOE). The ability to measure the pitch walk in scatterometry was also demonstrated. This work also explored the frontier of in-line XRD capability by enabling an automatic RSM fitting on tool to output pitch walk values. With these advances in metrology development, we are able to demonstrate the impacts of in-line monitoring in the SAQP process, to shorten the patterning development learning cycle to improve the yield.
Gate-all-around (GAA) nanowire (NW) devices have long been acknowledged as the ultimate device from an electrostatic scaling point of view. The GAA architecture offers improved short channel effect (SCE) immunity compared to single and double gate planar, FinFET, and trigate structures. One attractive proposal for making GAA devices involves the use of a multilayer fin-like structure consisting of layers of Si and SiGe. However, such structures pose various metrology challenges, both geometrical and material. Optical Scatterometry, also called optical critical dimension (OCD) is a fast, accurate and non-destructive in-line metrology technique well suited for GAA integration challenges. In this work, OCD is used as an enabler for the process development of nanowire devices, extending its abilities to learn new material and process aspects specific to this novel device integration. The specific metrology challenges from multiple key steps in the process flow are detailed, along with the corresponding OCD solutions and results. In addition, Low Energy X-Ray Fluorescence (LE-XRF) is applied to process steps before and after the removal of the SiGe layers in order to quantify the amount of Ge present at each step. These results are correlated to OCD measurements of the Ge content, demonstrating that both OCD and LE-XRF are sensitive to Ge content for these applications.
Complexity of process steps integration and material systems for next-generation technology nodes is reaching unprecedented levels, the appetite for higher sampling rates is on the rise, while the process window continues to shrink. Current thickness metrology specifications reach as low as 0.1A for total error budget – breathing new life into an old paradigm with lower visibility for past few metrology nodes: accuracy. Furthermore, for advance nodes there is growing demand to measure film thickness and composition on devices/product instead of surrogate planar simpler pads. Here we extend our earlier work in Hybrid Metrology to the combination of X-Ray based reference technologies (high performance) with optical high volume manufacturing (HVM) workhorse metrology (high throughput). Our stated goal is: put more “eyes” on the wafer (higher sampling) and enable move to films on pattern structure (control what matters). Examples of 1X front-end applications are used to setup and validate the benefits.
Advanced technology nodes, 10nm and beyond, employing multi-patterning techniques for pitch reduction pose new process and metrology challenges in maintaining consistent positioning of structural features. Self-Aligned Quadruple Patterning (SAQP) process is used to create the Fins in FinFET devices with pitch values well below optical lithography limits. The SAQP process bares compounding effects from successive Reactive Ion Etch (RIE) and spacer depositions. These processes induce a shift in the pitch value from one fin compared to another neighboring fin. This is known as pitch walking. Pitch walking affects device performance as well as later processes which work on an assumption that there is consistent spacing between fins. In SAQP there are 3 pitch walking parameters of interest, each linked to specific process steps in the flow. These pitch walking parameters are difficult to discriminate at a specific process step by singular evaluation technique or even with reference metrology such as Transmission Electron Microscopy (TEM). In this paper we will utilize a virtual reference to generate a scatterometry model to measure pitch walk for SAQP process flow.
Optical metrology is the workhorse metrology in manufacturing and key enabler to patterning process control. Recent advances in device architecture are gradually shifting the need for process control from the lithography module to other patterning processes (etch, trim, clean, LER/LWR treatments, etc..). Complex multi-patterning integration solutions, where the final pattern is the result of multiple process steps require a step-by-step holistic process control and a uniformly accurate holistic metrology solution for pattern transfer for the entire module. For effective process control, more process “knobs” are needed, and a tighter integration of metrology with process architecture.
KEYWORDS: Metrology, Critical dimension metrology, Semiconducting wafers, Reactive ion etching, Etching, Data processing, Data communications, Process control, Algorithm development
Hybrid metrology (HM) is the practice of combining measurements from multiple toolset types in order to enable or improve metrology for advanced structures. HM is implemented in two phases: Phase-1 includes readiness of the infrastructure to transfer processed data from the first toolset to the second. Phase-2 infrastructure allows simultaneous transfer and optimization of raw data between toolsets such as spectra, images, traces – co-optimization. We discuss the extension of Phase-1 to include direct high-bandwidth communication between toolsets using a hybrid server, enabling seamless fab deployment and further laying the groundwork for Phase-2 high volume manufacturing (HVM) implementation. An example of the communication protocol shows the information that can be used by the hybrid server, differentiating its capabilities from that of a host-based approach. We demonstrate qualification and production implementation of the hybrid server approach using CD-SEM and OCD toolsets for complex 20nm and 14nm applications. Finally we discuss the roadmap for Phase-2 HM implementation through use of the hybrid server.
Successful implementation of directed self-assembly in high volume manufacturing is contingent upon the ability to control the new DSA-specific local defects such as “dislocations” or “line-shifts” or “fingerprint-like” defects. Conventional defect inspection tools are either limited in resolution (brightfield optical methods) or in the area / number of defects to investigate / review (SEM). Here we explore in depth a scatterometry-based technique that can bridge the gap between area throughput and detection resolution. First we establish the detection methodology for scatterometry-based defect detection, then we compare to established methodology. Careful experiments using scatterometry imaging confirm the ultimate resolution for defect detection of scatterometry-based techniques as low as <1% defect per area sampled – similar to CD-SEM based detection, while retaining a 2 orders of magnitude higher area sampling rate.
Advanced nodes require precise detection and control of intricate profile details – scatterometry is tool of choice for such requirements. Scatterometry is a model-based technique, and needs extensive reference metrology for qualification. Such reference measurements are costly, time-consuming and often destructive causing delays in deployment. With increasing number of scatterometry steps in flow, and the requirement to collect more reference data points to statistically qualify shrinking metrology specifications, the cost and time for reference metrology is exponentially increasing. This work is aimed to significantly reduce this need. We developed a novel methodology whereby scatterometry spectral information itself is used to predict “virtual” reference data. We qualify this methodology on several key applications from 20nm and 14nm node. We find that performance of solution developed using proposed methodology is indeed similar to performance of solution obtained using real reference data, thereby significantly reducing the lead time to develop scatterometry solutions.
Work using the concept of a co-optimization-based metrology hybridization is presented. Hybrid co-optimization involves the combination of data from two or more metrology tools such that the output of each tool is improved by the output of the other tool. Here, the image analysis parameters from a critical dimension scanning electron microscope (CD-SEM) are modulated by the profile information from optical critical dimension (OCD, or scatterometry), while the OCD-extracted profile is concurrently optimized through addition of the CD-SEM CD results. The test vehicle utilized is the 14-nm technology node-based FinFET high-k/interfacial layer (HK/IL) structure. When compared with the nonhybrid approach, the correlation to reference measurements of the HK layer thickness measurement using hybrid co-optimization resulted in an improvement in relative accuracy of about 40% and in R2 from 0.81 to 0.91. The measurement of the IL thickness also shows an improvement with hybrid co-optimization: better matching to the expected conditions as well as data that contain less noise.
The accelerated pace of the semiconductor industry in recent years is putting a strain on existing dimensional metrology equipment (such as critical dimension-secondary electron microscopy, atomic force microscopy, scatterometry) to keep up with ever-increasing metrology challenges. However, a revolution appears to be forming with the recent advent of hybrid metrology (HM). We highlight some of the challenges and lessons learned when setting up a standard HM solution and describe the first-in-industry implementation of HM within a high-volume manufacturing environment.
In recent years Hybrid Metrology has emerged as an option for enhancing the performance of existing measurement toolsets and is currently implemented in production1. Hybrid Metrology is the practice to combine measurements from multiple toolset types in order to enable or improve the measurement of one or more critical parameters. While all applications tried before were improved through standard (sequential) hybridization of data from one toolset to another, advances in device architecture, materials and processes made possible to find one case that demanded a much deeper understanding of the physical basis of measurements and simultaneous optimization of data. This paper presents the first such work using the concept of co-optimization based hybridization, where image analysis parameters of CD-SEM (critical dimensions Scanning Electron Microscope) are modulated by profile information from OCD (optical critical dimension – scatterometry) while the OCD extracted profile is concurrently optimized through addition of the CD-SEM CD results. Test vehicle utilized in this work is the 14nm technology node based FinFET High-k/Interfacial layer structure.
The fast evolution of microelectronics fabrication technology demands a concurrent development in metrology
capabilities. In recent years, Mueller Matrix (MM) scatterometry has been asserted as a useful tool in
characterizing critical dimensions (CD) in periodical arrays of nanometer-size structures. Specifically, some
symmetry properties of the measured structure can be readily extracted from the MM, allowing effective
isolation of abnormal features. One example is measuring deviations of grating structures from perfect mirror
symmetry, characteristic of faults in the fabrication process.
The most general form of the Muller matrix requires 16 independent measurements, and requires spectral
ellipsometry. However, using some very general assumptions on the reflection properties of the measured
sample, one can reduce this number considerably. Such realistic assumptions are time independence of the
reflection properties, and homogeneity of the sample (i.e., constant reflectivity throughout the measurement
spot), as is the common case in optical CD metrology targets. We show that under these assumptions the
Mueller matrix can be completely measured using spectral reflectometry.
The goal of characterizing asymmetry is then further analyzed, and a new approach for such measurement,
based on spectral reflectometry, is presented. Specifically, using spectral differences metrology (SDM), this
approach is shown to provide a simpler means to measure the same asymmetry-dependent quantity as targeted
today using MM metrology, but requires only two distinct measurements leading to improved throughput.
KEYWORDS: Metrology, Semiconducting wafers, Critical dimension metrology, Transmission electron microscopy, Etching, Process control, Reactive ion etching, Data modeling, High volume manufacturing
Metrology tools are increasingly challenged by the continuing decrease in the device dimensions, combined with complex disruptive materials and architectures. These demands are not being met appropriately by existing/forthcoming metrology techniques individually. Hybrid Metrology (HM) – the practice to combine measurements from multiple toolset types in order to enable or improve the measurement of one or more critical parameters – is being incorporated by the industry to resolve these challenges. Continuing our previous work we now take the HM from the lab into the fab. This paper presents the first-in-industry implementation of HM within a High Volume Manufacturing (HVM) environment. Advanced 3D applications are the first to use HM: 20nm Contact etch and 14nm FinFET poly etch. The concept and main components of this Phase-1 Host-based implementation are discussed. We show examples of communication protocols/standards that have been specially constructed for HM for sharing data between the metrology tools and fab host in GLOBALFOUNDRIES, as well as the HM recipe setup and HVM results. Finally we discuss our vision and phased progression/roadmap for Phase-2 HM implementation to fully reap the benefits of hybridization.
Directed Self Assembly (DSA) for contact layers is a challenging process in need of reliable metrology for tight process control. Key parameters of interest are guide CD, polymer CD, and residual polymer thickness at the bottom of the guide cavity. We show that Optical CD (OCD) provides the needed performance for DSA contact metrology. The measurement, done with a multi-channel spectroscopic reflectometry (SR) system, is enhanced through elements of a Holistic Metrology approach such as Injection and Hybrid Metrology.
The accelerated pace of the semiconductor industry in recent years is putting a strain on existing dimensional metrology
equipments (such as CDSEM, AFM, Scatterometry) to keep up with ever-increasing metrology challenges. However, a
revolution appears to be forming with the recent advent of Hybrid Metrology (HM) - a practice of combining
measurements from multiple equipment types in order to enable or improve measurement performance. In this paper we
extend our previous work on HM to measure advanced 1X node layers - EUV and Negative Tone Develop (NTD) resist
as well as 3D etch structures such as FinFETs. We study the issue of data quality and matching between toolsets
involved in hybridization, and propose a unique optimization methodology to overcome these effects. We demonstrate
measurement improvement for these advanced structures using HM by verifying the data with reference tools (AFM,
XSEM, TEM). We also study enhanced OCD models for litho structures by modeling Line-edge roughness (LER) and
validate its impact on profile accuracy. Finally, we investigate hybrid calibration of CDSEM to measure in-die resist line
height by Pattern Top Roughness (PTR) methodology.
KEYWORDS: Metrology, Scatterometry, Critical dimension metrology, Semiconducting wafers, Data modeling, Atomic force microscopy, Transmission electron microscopy, Inspection, 3D metrology
Shrinking design rules and reduced process tolerances require tight control of critical dimension (CD) linewidth, feature shape, and profile of the printed geometry. The holistic metrology approach consists of utilizing all available information from different sources such as data from other toolsets, multiple optical channels, multiple targets, etc., to optimize metrology recipe and improve measurement performance. Various in-line CD metrology toolsets such as scatterometry optical CD, CD-SEM, and CD-AFM are typically utilized individually in fabs. Each of these toolsets has its own set of limitations that are intrinsic to specific measurement technique and algorithm. Here we define "hybrid metrology" to be the use of any two or more metrology toolsets in combination to measure the same dataset. We demonstrate the benefits of the hybrid metrology on two test structures: 22-nm-node gate develop inspect and 32-nm-node fin-shaped field effect transistor gate final inspect. We will cover measurement results obtained using typical BKM (nonhybrid, single toolset standard results) as well as those obtained by utilizing the hybrid metrology approach. Measurement performance will be compared using standard metrology metrics; for example, accuracy and precision.
Improvement in metrology performance when using a combination of multiple optical channels vs. standard single
optical channel is studied. Two standard applications (gate etch 4x and STI etch 2x) are investigated theoretically
and experimentally. The results show that while individual channels might have increased performance for few
individual parameters each - it is the combination of channels that provides the best overall performance for all
parameters.
Shrinking design rules and reduced process tolerances require tight control of CD linewidth, feature shape, and profile of
the printed geometry. The Holistic Metrology approach consists of utilizing all available information from different
sources like data from other toolsets, multiple optical channels, multiple targets, etc. to optimize metrology recipe and
improve measurement performance. Various in-line critical dimension (CD) metrology toolsets like Scatterometry OCD
(Optical CD), CD-SEM (CD Scanning Electron Microscope) and CD-AFM (CD Atomic Force Microscope) are typically
utilized individually in fabs. Each of these toolsets has its own set of limitations that are intrinsic to specific
measurement technique and algorithm. Here we define "Hybrid Metrology" to be the use of any two or more metrology
toolsets in combination to measure the same dataset. We demonstrate the benefits of the Hybrid Metrology on two test
structures: 22nm node Gate Develop Inspect (DI) & 32nm node FinFET Gate Final Inspect (FI). We will cover
measurement results obtained using typical BKM as well as those obtained by utilizing the Hybrid Metrology approach.
Measurement performance will be compared using standard metrology metrics for example accuracy and precision.
Optical properties (n and k) of the material films under measurement are commonly assumed invariant and fixed in scatterometry modeling. This assumption keeps the modeling simple by limiting the number of floating parameters in the model. Such scatterometry measurement has the potential to measure with high precision some of the profile parameters (critical dimension, sidewall angle). The question is: if the optical properties modeled as "fixed" are actually changing, would this modeling assumption impact the accuracy of reported geometrical parameters? Using the example of a resist profile measurement, we quantify the "bias" effect of unmodeled variation of optical properties on the accuracy of the reported geometry by utilizing a traditional fixed n and k model. With a second model, we float an additional optical parameter and lower the bias of the reported values, at the expense of slightly increased "noise" of the measurement (more floating parameters, less precision). Finally, we extend our multistack approach (previously introduced as an enabler to the product-driven material characterization methodology) to augment the spectral information and increase both precision and accuracy through the simultaneous modeling of multiple targets.
Optical properties (n&k) of the material films under measurement are commonly assumed invariant and fixed in
scatterometry modeling. This assumption keeps the modeling simple by limiting the number of floating parameters in
the model. Such scatterometry measurement has the potential to measure with high precision some of the profile
parameters (CD, Sidewall angle). The question is: if the optical properties modeled as "fixed" are actually changing -
would this modeling assumption impact the accuracy of reported geometrical parameters?
Using the example of a resist profile measurement, we quantify the "bias" effect of un-modeled variation of optical
properties on the accuracy of the reported geometry by utilizing a traditional fixed n&k model. With a second model we
float an additional optical parameter and lower the bias of the reported values - at the expense of slightly increased
"noise" of the measurement (more floating parameters - less precision). Finally, we extend our multi-stack approach
(previously introduced as enabler to the product-driven materials characterization methodology) to augment the spectral
information and increase both precision and accuracy through the simultaneous modeling of multiple targets
This paper discusses a novel methodology of material characterization that directly utilizes the scatterometry targets on
the product wafer to determine the optical properties (n&k) of various constituent materials. Characterization of optical
constants, or dispersions, is one of the first steps of scatterometry metrology implementation. A significant benefit of
this new technique is faster time-to-solution, since neither multiple single-film depositions nor multi-film depositions on
blanket/product wafers are needed, making obsolete a previously required-but very time-consuming-step in the
scatterometry setup. We present the basic elements of this revolutionary method, describe its functionality as currently
implemented, and contrast/compare results obtained by traditional methods of materials characterization with the new
method. The paper covers scatterometry results from key enabling metrology applications, like high-k metal gate (postetch
and post-litho) and Metal 2 level post-etch, to explore the performance of this new material characterization
approach. CDSEM was used to verify the accuracy of scatterometry solutions. Furthermore, Total Measurement
Uncertainty (TMU) analysis assisted in the interpretation of correlation data, and shows that the new technique provides
measurement accuracy results equivalent to, and sometimes better than, traditional extraction techniques.
A method that uses Fourier Transform Infrared (FTIR) Reflectance spectroscopy to determine the depths of poly silicon filled trenches is described. These trenches, which form the cells for trench DRAM, are arranged in arrays that are periodic in both directions. The method is non-contact and non-destructive. Large number of points per wafer can be easily measured to determine etch uniformity performance. Unlike cross section SEM based metrology, the wafer does not need to be cleaved, and thereby destroyed. The technique is thus suited for in-line metrology of product wafers. The FTIR technique was found t be very robust and provided excellent correlations with SEMs have been observed for 110 nm trenches and are reported in the paper. The method is a viable manufacturing solution for inline, non-destructive, rapid metrology on product wafers.
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