Dr. Farah Huq Kmiec Profile

Dr. Farah Huq Kmiec

at Siemens EDA

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Proceedings Article | 28 April 2023 Paper

EUV full-chip curvilinear mask options for logic via and metal patterning

Neal Lafferty, Sagar Saxena, Keisuke Mizuuchi, Yuansheng Ma, Xima Zhang, Pat LaCour, Alexander Tritchkov, Farah Kmiec, John Sturtevant

Proceedings Volume 12495, 124950K (2023) https://doi.org/10.1117/12.2647882

KEYWORDS: SRAF, Optical proximity correction, Machine learning, Lithography, Simulations

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With the adoption of multi-beam mask writing (MBMW) technology, there is a strong drive to realize the maximum lithographic process window entitlement which can be obtained with curvilinear masks, including both SRAFs and main features. Inverse Lithography Technology (ILT) has always featured prominently in planning for such masks, as it can produce the ideal curvilinear patterns which represent the best possible solution. The runtime for ILT, however, remains too slow for full-chip logic manufacturing and this paper will review multiple alternative approaches which endeavor to produce similar output masks but with significantly faster runtime. Results will be shown for 3nm-node via and metal examples where full ILT, hybrid ILT and dense curvilinear OPC, hybrid curvilinear SRAF and dense curvilinear OPC, and machine learning approaches will be assessed for runtime and a variety of lithographic metrics. Overall, all solutions are shown to be considerably faster than full ILT, ranging between 4x (for hybrid ILT SRAF) to <100X improved runtime performance. Lithographic capability is characterized in terms of distributions of edge placement errors (EPE), PV Bands, and ILS/NILS. There are some minor differences between the various options, but given the pronounced runtime advantages over ILT, all are compelling options, delivering lithographic PW enablement close to the ideal ILT solution. For the model-based DNN, and Monotonic Machine Learning (MML) approaches, we will discuss the approach, challenges, and advantages associated with robust training to ensure the broadest possible pattern coverage.

Proceedings Article | 28 April 2023 Poster + Paper

Impact of mask rule constraints on ideal SRAF placement

Monica Kempsell Sears, Farah Huq Kmiec, Neal Lafferty, John Sturtevant

Proceedings Volume 12494, 124941C (2023) https://doi.org/10.1117/12.2657767

KEYWORDS: SRAF, Printing, Extreme ultraviolet, Deep ultraviolet, Image quality, Lithography

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The semiconductor industry has deployed EUV for the latest technology nodes, but the mask making limits have not scaled linearly with the wavelength. Characterization of the tradeoff between ideal placement of subresolution assist features (srafs) versus mask rule constraints (MRC) is needed. In this paper, a simulation study was performed with DUV, low NA EUV, and high NA EUV models on 1D patterns. Using systematic variation, the ideal width and pitch of the primary sraf was identified according to multiple metrics, Image Log Slope (ILS) and process variation (PV) band width. For DUV, optimum sraf placement maintains a large margin between the MRC limits and the sraf printing threshold. However for EUV, the ideal sraf likely violates the MRC minimum width. This is especially true for high NA EUV operating at a low aerial image threshold (AIT), where the ideal sraf width for ILS is only 2 nm. This paper quantifies the degradation in litho quality with the enforcement of increasing MRC limits. Alternative sraf insertion by chopping long srafs into minimum length srafs is applied to prevent sraf printing at MRC valid dimensions, while maintaining improved litho quality over no sraf.

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