The Critical Dimension Uniformity (CDU) specification on photomasks continues to decrease with each successive node.
The ITRS roadmap for optical masks indicates that the CDU (3 sigma) for dense lines on binary or attenuated phase shift
mask is 3.4nm for the 45nm half-pitch (45HP) node and will decrease to 2.4nm for the 32HP node. The current
capability of leading-edge mask shop patterning processes results in CDU variation across the photomask of a similar
magnitude.
Hence, we are entering a phase where the mask CDU specification is approaching the limit of the capability of the
current Process of Record (POR). Mask shops have started exploring more active mechanisms to improve the CDU
capability of the mask process. A typical application is feeding back the CDU data to adjust the mask writer dose to
compensate for non-uniformity in the CDs, resulting in improved quality of subsequent masks. Mask makers are
currently using the CD-SEM tool for this application. While the resolution of SEM data ensures its position as the
industry standard and continued requirement to establish the photomask CD Mean to Target value, a dense measurement
of CDs across the reticle with minimal cycle time impact would have value.
In this paper, we describe the basic theory and application of a new, reticle inspection intensity-based CDU approach
that has the advantage of dense sampling over larger areas on the mask. The TeraScanHR high NA reticle inspection
system is used in this study; it can scan the entire reticle at relatively high throughput, and is ideally suited for collecting
dense CDU data. We describe results obtained on advanced memory masks and discuss applications of CDU maps for
optimizing the mask manufacturing process. A reticle inspection map of CDU is complementary to CD-SEM data. The
dense data set has value for various applications, including feedback to mask writer and engineering analysis within the
mask shop.
For the 90nm-lithography node, understanding the impact of various reticle pinhole defects on wafer printability is essential to optimize wafer yield and to create the best quality reticle defect specification. In this study, a new programmed pinhole test reticle was designed by UMC, TCE and KLA-Tencor based on UMC's process requirements for its 193nm lithography. The reticle was manufactured and inspected on KLA-Tencor's high-resolution reticle inspection system in die to database mode by TCE. The reticle was then printed on a wafer by UMC to characterize the printability impact of programmed pinhole defects. The programmed pinhole test reticle, "193PTM", consists of two IC background patterns - poly gate and contact with programmed pinholes at various locations. The pinhole size ranges from 20nm to 75nm in 5nm increments on the wafer. By comparing the high-resolution pattern inspection results to the wafer print data, we have established the correlation and the appropriate mask specifications based on wafer application guidelines.
Alternating phase shift reticles are one proposed solution for printing features required at the 90 nm and 65 nm nodes using 193 nm lithography. A key enabler to the adoption of this technology is defect inspection so as to guarantee defect free reticles are delivered to wafer fab production. A test reticle with programmed sub-180 degree phase bump and divot defects has been developed that is representative of the sub-90 nm node. This reticle is characterized by SEM methods. This test reticle in turn is used to determine the defect detection performance of a DUV reticle inspection tool, which uses a phase contrast enhanced optical system to improve the detection of phase defects. This presentation discusses several of the challenges in the design and manufacture of the programmed defect test reticle, the reticle characterization results, and the inspection station results. Defect review methods are described which differentiate between chrome, phase bump, and phase divot defects. Additionally, a best known methodology (BKM) is discussed for the manufacture of alternating phase shift masks based upon detecting killer defects before significant additional value is added.
Alternating Phase Shift Masks (altPSM's) are an option for the production of critical layers at the 100 nm technology node and below. Successful implementation of altPSM's into a wafer manufacturing process depends upon the ability to successfully inspect, disposition and repair defects that occur during the mask manufacturing process. One technique previously described to improve phase defect contrast was the use of simultaneous transmitted and reflected light [1][2]. The previous technique provided for improved phase defect detection in altPSM's produced for the 130 nm node at a 248 nm lithographic wavelength. This work describes the results from a die-to-die inspection method that improves phase defect contrast in transmitted light for altPSM's produced for the 100 nm node at a 193 nm wavelength. The improved phase defect detection technique addresses the challenges of decreasing linewidth/pitch and reduced defect phase resulting from the decrease in lithographic wavelength relative to the inspection wavelength of light. The improved phase defect detection method also provides a method to determine whether a defect is a binary, phase bump or phase divot type of defect. Results are compared against the previous inspection methods. A test vehicle for gathering sensitivity performance data is described along with the results obtained from the inspection system.
Sub-wavelength lithography used for 9Onm node devices requires new approaches to both lithography processes and reticle design. Reticle complexity has increased as OPC and Phase Shift techniques are used to improve lithography process windows at smaller design rules. This paper will discuss the results of algorithms developed for specific layers to extend the TeraStar reticle inspection tool to 9Onm reticle research and development applications. Lithographically challenging layers have been the focus of the algorithm development programs, specifically gate layers and contact/via layers. Alternating phase shift masks are gaining importance as a reticle enhancement technique to meet the ITRS Litho Roadmap 9Onm node line widths. A new class of TeraPhase algorithms has been developed for alternating phase shift mask inspection with a focus on gate layers. Die-to-die and die-to-database inspection results will be presented for alternating phase shift programmed defect test plates and production gate layers. Contact and via layer reticles are some of the most difficult layers for CD and lithography process window control. A new family of TeraFlux algorithms has been developed based on flux energy differences between contacts to significantly improve sensitivity to lithographically significant CD errors. Die-to-die and die-to-database inspection results will be presented for contact programmed defect test plates and production contact and via layers. Comparisons of the newly developed algorithms will be made to previous generation inspection capability.
Alternating Phase Shift Masks (altPSM’s) are an option for the production of critical layers at the 100 nm technology node and below produced at ArF lithographic wavelength. Successful implementation of altPSM’s depends upon the ability to successfully inspect, disposition and repair defects that occur during the manufacturing process.
One technique previously described to improve phase defect contrast was the use of simultaneous transmitted and reflected light. The previously described technique provided for improved phase defect detection in altPSM’s produced for the 130 nm node at a 248 nm lithographic wavelength. This work describes the results from a die-to-die inspection method that improves phase defect contrast in transmitted light for altPSM’s produced for the 100 nm node at a 193 nm wavelength. The improved phase defect detection technique addresses the challenges of decreasing linewidth/pitch and reduced defect phase resulting from the decrease in lithographic wavelength relative to the inspection wavelength of light. The improved phase defect detection method also provides a method to determine whether a defect is a binary, phase bump or phase divot type of defect. Results are compared against the previous inspection methods. A test vehicle for gathering sensitivity performance data is described along with the results obtained from the inspection system.
This paper discusses the challenges to alternating phase shift mask defect inspection and new approaches for phase defect detection using multiple illumination methods in conjunction with defect detection algorithm modifications. Die-to-die inspection algorithms were developed for the KLA-Tencor 365UV-HR (APS algorithm) and TeraStar SLF27 (TeraPhase algorithm) inspection systems based upon the use of simultaneous transmitted and reflected light signals. The development of an AltPSM programmed test vehicle is described and defect sensitivity characterization results from programmed phase defect reticles are presented. A comparison of the two approaches used for the different inspection systems is discussed. A comparison of TeraPhase to transmitted light only results from a programmed phase defect test mask shows improved phase defect detection results.
Alternating phase shift masks (altPSM) are gaining importance as a reticle enhancement technique to meet the ITRS Litho Roadmap sub-130 nm node line widths. AltPSM fabrication usually involves etching of the quartz substrate in order to form the phase shift structures. Defects can arise during the quartz-etching step from imperfections in the resist image thereby causing various forms of phase shifting defects on the reticle. These reticle phase shift defects can result in printable defects on the wafer. In order to prevent wafer yield loss from occurring, it is necessary to detect and repair the reticle defects. A die-to-die inspection algorithm using simultaneous transmitted and reflected light signals was developed for the KLA-Tencor TeraStar SLF27 inspection system. The algorithm processes the transmitted and reflected light signals in parallel to detect both phase and chrome defects at high speed. One of the several challenges in the use of reflected light for pattern defect detection on alternating phase shift masks is to ignore lithographically insignificant mask process artifacts such as bright chrome 'halos' which may exhibit significant differences between adjacent die. This paper discusses the inspection challenges of alternating phase shift masks. Defect sensitivity characterization results from programmed phase defect reticles are presented.
Phase shifting mask technology will be necessary to product integrated circuits at the 130 nm node using KrF wavelength steppers. In order to successfully accomplish this goal, it is necessary to detect and repair phase shifting defects that may occur in the manufacture of these reticles. An inspection algorithm has been developed to improve the phase shift defect detection rate of an UV reticle inspection system and is based upon the simultaneous use of the transmitted and reflected light signals. This paper describes the phase defect sensitivity improvement over transmitted light only pattern inspection results and simultaneous transmitted and reflected light based contamination inspection results.
The manufacturing implementation of alternating aperture PSM's (AltPSM) has been gated by the impacts these techniques have on reticle manufacturing, specifically reticle defect inspection and repair. Die-to-die inspection techniques have been achieved for some clearfield multiphase alternate phase reticles, but the required die-to-database solutions are not currently available with defect inspection systems. In response to these mask manufacturing issues and IC design layout issues, resolution enhancing techniques based on Darkfield Alternate Phase (DAP) reticle designs are now of growing importance. A DAP Programmed Evaluation Reticle, DAPPER, was fabricated and inspected on a new high numerical aperture ultraviolet reticle inspection system. The results show reasonable defect sensitivity performance in the presence of both reticle geometry and quartz etch topography characteristic of 130-nm node advanced logic circuit DAP reticles.
An investigation was performed to determine the printability and defect detectability of reticle OPC defects for the 180 nm technology node. Two different OPC approaches were investigated, one based upon assist bar/serif features and the other based upon serif/jog features. Several critical defects were studied, including chrome extension defects on assist bars and pindots between assist bars and primary features. Wafers were printed using a 0.6 NA, DUV stepper and resulting wafer resist images measured by CD SEM. Edge defects as small as 200 nm cause greater than 10% change in local linewidth, 400 nm defects cause catastrophic wafer defects, and chrome spot with 260 nm diameter can shorten gap between two line ends by 10%. CD defects less than 75 nm on the reticle were found to have a significant impact on the process window. The programmed defect test reticles used to print the wafers were inspected on KLA-Tencor reticle inspection systems and the defect sensitivity capture curves plotted. Defect capture rates indicated that smaller than 200 nm edge defects and 125 nm CD defects are detected. Defect printability simulations were performed using database and aerial images gathered from an automated defect inspection system and compared to the experimental wafer results. The purpose of this test is to determine the feasibility of performing printability predictions in a mask production environment. A correlation between the simulations and the wafer results are shown.
As semiconductor processes have moved towards lower k1 and mask inspection equipment has moved into the UV range, more subtle reticle defects have been found to cause manufacturing problems. Lower k1 and new lithography processes and reticle technologies, such as OPC and PSM, have made it difficult to determine the significant and these defects. This paper reports on the development of a simulation tool that will improve the yield and productivity of photomask manufacturers and wafer manufacturers by improving reticle defect assessment. This study demonstrates the accuracy of simulation software that predicts resist patterns based on sophisticated modeling software that uses optical images obtained from a state-of-the-art UV optical inspection system. A DUV 4X reduction stepper was used to print a reticle with programmed defects across an exposure/focus matrix, with the minimum feature size being 200 nm. Quantitative comparisons between predicted and measured wafer CDs were made. In summary, it was found that the simulation software based solely on aerial images predicted absolute CDs with limited accuracy, but differential CDs with limited accuracy, but differential CDs, obtained by utilizing both the reference and defect images, were predicted accurately. Comparison of simulations using both reticle SEM images and optical reticle inspection images showed good agreement, demonstrating the accuracy and high resolution of the optical reticle inspection images. Application of differential aerial images to a simple test case showed that it was possible to identify and therefore eliminate a significant number of defects that did not print, thereby improving defect assessment.
One of the primary goals for low K1 lithography is to maintain consistent pattern alignment against wafer thin-film stack effect, substrate reflectivity and graininess. Alignment sensitivity to such perturbations is basically reflected in increases or decreases of the amount of the diffracted energy captured by the stepper alignment detectors. "Tunning" the alignment marks etch depth/thin film stack/coating thickness and uniformity with the stepper optical alignment system can improve dramatically the alignment capability of an existing machine. The present paper reports on our simulation and experimental work to "tune" the alignment mark topography to a Nikon LSA alignment system. Parameters known to affect alignment capability, such as Si etch depth or Si oxide etch depth were first analyzed and experimentally verified. Then alignment marks topographies with more complex (but also more closer to real situations) were simulated and experimentally studied. Situations when a "phase shifter" or a "phase compensator" is constructed on the LSA marks may overcome initial etch depth influence upon alignment capability and registration results. In most cases simulation results can predict "succesful alignment" when diffracted energy efficiency is higher than 3 to 5%. Phase shifters/compensators improved registration results (mean +3S) to 0.120 - 0.150um, on practical multilayer topographies.
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