An all-optical half adder (AOHA) on a square lattice photonic crystal structure with silicon rods in air is proposed. The AOHA design consisted of constructive and destructive interference-based XOR gate and AND gate, which were respectively devised by Y- and T-shaped waveguides to produce Sum and Carry logical outputs. The band structure of the proposed device was assessed by the plane wave expansion (PWE) method, and the electric field distributions and functional parameters were estimated by the finite difference time domain (FDTD) method. The functional parameters obtained for the AOHA include a contrast ratio of 9.42 dB for the Sum and 12.87 dB for the Carry, response time of 0.888 ps, operating bit rate of 1.126 Tb/s, and footprint of 290 μm2. The normalized intensity of the AOHA was >86 % and <12 % for logic “1” and logic “0,” respectively. Hence, the proposed AOHA design is highly suitable for photonic networks and photonic integrated circuits.
We present a design of an all-optical 4 to 1 multiplexer by cascading four stages of ψ-shaped three-input AND gates and a Y-shaped four-input OR gate on a square lattice photonic crystal with rods in air interface. The three-input AND gate was designed separately to achieve efficient logical output and integrated into the multiplexer, and the OR gate design was subsequently incorporated with the multiplexer design. The band diagram of the proposed structures was computed using the plane wave expansion method, and the electric field distributions were estimated using the finite-difference time-domain method. The all-optical three-input AND gate had a normalized intensity of 90% for logic “1” and 10% for logic “0,” a contrast ratio (CR) of 9.54 dB, a response time of 0.816 ps, and an operating bit rate of 1.224 Tb / s with a footprint of 189 μm2. The all-optical 4 to 1 multiplexer had a normalized intensity of 79% for logic “1” and 2% for logic “0,” a CR of 15.96 dB, a response time of 0.848 ps, and an operating bit rate of 1.179 Tb / s with a footprint of 1040 μm2. Therefore, the proposed 4 to 1 multiplexer design would be a desirable structure for optical signal processing and photonic integrated circuits.
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