Proceedings Article | 17 April 2014
KEYWORDS: Semiconducting wafers, Extreme ultraviolet, Photoresist processing, Thin film coatings, Scanning electron microscopy, Extreme ultraviolet lithography, Coating, Line width roughness, Lithography, Metrology
EUV lithography (EUVL) is well known to be a strong candidate for next generation, single exposure, sub-30nm half-pitch lithography. Much progress relevant to EUVL has been reported for a decade, however, many issues continue to challenge implementation for volume production.[1,2] On the other hand, it seems that the coat develop track process remains very similar and in many aspects returns to KrF or ArF dry process fundamentals, but in practice 26-32nm pitch patterning coat develop track process also has challenges with EUV resist. As access to EUV lithography exposures has become more readily available over the last five (5) years, several challenges and accomplishments in track processing have been reported, such as the improvement of ultra-thin film coating, CD uniformity, defectivity, line width roughness (LWR), and so on.[3,4,5,6] The coat-develop track process has evolved along with novel materials and metrology capability improvements. By coating ultra-thin under layers and resist films and by controlling resist dissolution, the SOKUDO DUO coat develop track system at IMEC (Leuven, Belgium), with ASML NXE3100 exposure, has been used to demonstrate improved CD uniformity, LWR, and defect control. Additionally, we will show the latest lithographic results obtained by novel processing approaches in EUV coat develop track system.
