Hybrid integration of different materials will allow for different functionalities such as passive, amplifying, nonlinear, electro-optic, detection etc to build “system on a chip” devices. The vertically stacked layer design commonly proposed significantly increases the difficulty of the lithography process for the bottom-most layer due to the overlying topology. A methodology for significantly improving the fabrication tolerance of planar directional couplers is therefore presented. A parametric design study reveals that significant dimensional sensitivity improvements exist for certain center-to-center spacings for both power and wavelength splitters.
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