For the mass production of the advanced semiconductor device, the multi-layer process has been used for the essential
technique {photoresist/ silicon contained hard mask (Si-HM)/ spin-on-carbon-hardmask (SOC)}. Spin -on-Carbon
material plays a very important role during the etching process of substrates. The substrate etching process induces
severe pattern deformations (called wiggling) especially with fine line/space patterns. Therefore, both the high etching
resistances and the high wiggling resistance are demanded for SOC materials.
In this study, we investigated the etching performances with several SOC materials. We found that the relationships
between SOC properties and the resistance for wiggling generation. We will discuss the material design of novel SOC
for high wiggling resistance.
In order to achieve miniaturization of the device, and still following device design rules, the photo-resist film thickness has decreased. The thinner photo-resist thickness will improve the resolution limit and prevent the pattern collapse issue. In order to solve these problems a multilayer process is used that has several advantages over previous process designs: reflectivity control in hyper-NA lithography process, decreasing LWR, and the viewpoint of lithographic process margin. The multilayer process consists of three layers: layer one is patterned photo-resist, the second layer is Si-ARC (Si contented Anti Reflective Coatings), and the third layer is SOC (Spin on Carbon) also known as underlayer. There are two processes to deposit Si-ARC and SOC, the first is by spin coating with either a track or spin coater, the second is with a Chemical Vapor Deposition (CVD). From a cost of ownership standpoint the spin on process is better. In the development of spin on Si-ARC and SOC materials it is important to consider the resist profile and the shelf life stabilities. Another important attribute to consider is the etching characteristics of the material. For the Si-ARC the main attribute when determining etch rate is the Si content and for the SOC material the main attribute is the C content in the material. One problem with the spin on multilayer process is resist profile and this paper will examine this problem along with the characteristics of developed material is described.
The present paper describes a novel class of bottom antireflective coating (BARC) and gap fill materials using dextrin derivatives. The general trend of interconnect fabrication for such a high performance LSI is to apply cupper (Cu)/ low-dielectric-constant (low-k) interconnect to reduce RC delay. A via-first dual damascene process is one of the most promising processes to fabricate Cu/ low-k interconnect due to its wide miss-alignment margin. The sacrificial materials containing dextrin derivatives under resist for lithography were developed in via-first dual damascene process. The dextrin derivatives in this study was obtained by the esterification of the hydroxyl groups of dextrin resulting in improved solubility in the resist solvents such as propylene glycol monomethylether, propylene glycol monomethylether acetate, and ethyl lactate due to avoid the issue of defects that were caused by incompatability. The etch rate of our developed BARC and gap fill materials using dextrin derivatives was more than two times faster than one of the ArF resists evaluated in a CF4 gas condition using reactive ion etching. The improved etch performance was also verified by comparison with poly(hydroxystyrene), acrylate-type materials and latest low-k materials as a reference. In addition to superior etch performance, these materials showed good resist profiles and via filling performance without voids in via holes.
This study relates to characterization of gap fill materials for advanced ArF lithography process that allows the
formation of the gap fill materials having an excellent planarization property on a substrate having irregularities such as
nanometer scale pattering holes and trenches to increase the depth of focus and resolutions, and large CF4 gas etching
rate as compared with that of a resist while providing an excellent resist pattern without causing an intermixing with a
resist layer, and that it can be specifically used in a damascene process for the introduction of a wiring material Cu
(copper) used for reducing a wiring delay of a semiconductor device in recent years.
In the characterization of gap fill materials for an excellent planarization property of lithography, it was obtained two
key factors such as a specific relationship between the cross-link reaction group concentration of the polymers contained
in the gap fill materials and the via filling performance, and a specific relationship between a solvent used in the polymer
solution and the via filling performance. The application of gap fill materials based on this characterization is one of the
most promising processes ready to be investigated into mass production of the present 65-90 nm node dual damascene
lithography.
Conventional method of patterning trenches in a via first trench last Dual Damascene process involves filling the thickness bias with thermal cross-link gap fill material and then applying the photoresist followed by trench lithography. The major problem of this process is the large thickness bias (step height) observed as the via pattern pitch and density changes across the wafer.
Now, the new approach of UV cross-link system instead of thermal cross-link gap fill material is proposed. The material is referred to as UV cross-link film (XUVTM).
The main properties of UV cross-link film are small thickness bias of blanket field and dense-via pattern, high planarization, and void free by using the newest UV cross link process that we studied in UV-photo irradiation system. The process for UV cross-link film is very simple, just UV ray irradiate the film for about 10 s in the same coater-developer tool.
In this paper, we study the novel approach, UV cross-link process for reducing the thickness bias. The planarization of XUVTM was very high as compared with that of the film obtained from thermal cross-link gap fill material as the reference. The application of UV cross- link process using XUVTM is one of the most promising processes ready to be investigated into mass production to leave out the dry etch back process before patterning trench in via first trench last Dual Damascene lithography.
This paper describes the new developer-soluble gap fill materials, which are called wet gap fill materials, with wide process
window. In order to reduce isolated/dense fill bias that comes from substrate topography, dry gap fill materials are used in
combination with a plasma dry etch-back process. At the same time, the wet gap fill materials are coated thick enough to
planarize all the topography and is then recessed using a standard 0.26N tetramethylammonium hydroxide (TMAH)
developer. The material recess process takes place in the same track where it is coated and therefore simplifies the process
and increases wafer throughput. We developed easy-to-use wet gap fill materials recently. Performances and properties of
three types of wet gap fill materials (NCA2546, NCA2549, and NCA2550) based on the same polymer platforms will be
discussed.
Innovative technologies are required by integrated circuit manufacturers to create smaller feature sizes on chips. According to the semiconductor roadmap, feature sizes are slated to be as small as 45nm in 2007, and sizes will be continued to decrease in the following years. Suitable absorbance, Lower etch resistance, straight photoresist profiles, wider D.O.F., thinner film thickness, more effective barrier properties to reduce resist poisoning, and sublimate reduction for defect free coating are the major concerns to be taken into consideration for new BARC and gap fill materials. In this paper, the study of sublimate reduction in the new BARC and gap fill materials was investigated. The effect of sublimate reduction from BARC in bake process is related to decrease defect number. We will introduce new BARC and gap fill material consisted of the polymers with self crosslink-reaction system. In addition of sublimate reduction data, resist profiles and 130 nm via fill performance in via- first dual damascene process presented here would show clearly these materials are ready to be investigated into mass production of 90 nm node IC devices and beyond.
The "resist poisoning", development defect of photo-resist pattern, has become more serious problem in via-first dual damascene process for 65-nm technology node and beyond. Suppression of the resist poisoning using by novel gap fill (GF) materials is investigated and the influence of GF material's properties on the poisoning is also clarified. It is concluded that the poisoning suppression is associated with chemical reaction between functional groups in the GF film and basic contamination causing the poisoning. On the other hand, the film properties such as film density and hardness do not influence on the poisoning. A mechanism for the poisoning generation is proposed that the GF material can capture the poisoning-contamination in polymer matrix during cross-linking reaction. The capture-reaction can prevent the contamination from diffusion into the photo-resist. Finally, a new GF material, sample-D, suppresses the poisoning to the same level as a process with annealing treatment.
In the case of LSI pattern rules with linewidth of 0.1μm or less, the conventional LSI process is no longer adequate and new process and materials are needed to further enhance the performance of LSI. The materials used to reduce delay include a wiring material, Cu, and a low-k film for interlayer insulation. The technology specially developed for using Cu instead of Al as a wiring material is Dual Damascene process (DD process). In DD process, bottom anti-reflective coating (BARC) and gap fill materials are applied on a substrate of huge topography. Therefore, the gap fill material has to provide a coating of reduced thickness bias between the areas of isolated-via and dense-via, have a higher etch rate than ArF resists, be void free, and have no intermixing with resists and BARC.
In order to achieve lower dielectric constant, porous low-k materials will be used at BEOL for the next generation. Etch rates of porous low-k materials are higher than that of conventional low-k materials, which in turn requires a gap fill material of even higher etch rate. This paper describes the new BARC and gap fill material with high etch rate for 45 - 65 node DD processes. The polymer of new materials applies high oxygen content for high etch rate. The performance and via-filling properties in BARC (NCA4401C) and gap fill material (NCA2131) are discussed.
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