Proceedings Article | 6 June 2024
KEYWORDS: Digital signal processing, Analog to digital converters, Signal processing, Interpolation, Signal to noise ratio, Quantization, Aliasing, Reconstruction algorithms
Continuous Time Digital Signal Processing (CT-DSP) has the potential of being disruptive in four engineering disciplines: digital signal processing, control systems, compressive sensing, and spiking neural networks. In July 2022, a pipeline level crossing analog-to-digital architecture was published by Jungwirth and Crowe. In this paper a real-time level crossing sampling interpolation algorithm is introduced. Digital Signal Processing (DSP) systems are treated as Linear Time-Invariant (LTI) systems, and the reconstruction operator is also LTI. This provides DSP with some important advantages. It benefits from mature linear system theory, mature Discrete Time (DT) systems theory, the ability to postpone the reconstruction operator until the final stage, and the well understood Whittaker-Kotel'nikov-Shannon reconstruction. However, CT-DSP is not linear; the reconstruction is time-variant and complicated. Design of CT-DSP systems is more difficult than for DSP, but the justification for assuming this added difficulty is based on significant advantages in signal capture accuracy and in reduction in power requirements. For DSP, the quantization noise floor is determined by Bennett's quantization error equation, and it remains fixed, relative to the Analog-Digital-Converter's (ADC) input range. However, the noise floor for CT-DSP is largely determined by the reconstruction algorithm and is not entirely dependent on the number of quantization levels. For example, Tsividis demonstrated ~100 dB Signal-to-Noise and Distortion ratio (SINAD) for a 16-level (4-bit equivalent) level crossing ADC, using offline signal reconstruction. This implies that CT-DSP’s SINAD does not significantly degrade for weak signals. In addition to the Tsividis revelation of the accuracy of these signals, several demonstrations of the advantages of CT-DSP have been reported. Zhao and Prodic demonstrated reduced lag and a 3x reduction in overshoot in the controller for a DC-DC buck-boost converter. Qaisar and Hussain reported a 3x decrease in the number of sample points needed for accurate classification of arrythmias using level crossing Electrocardiogram (ECG) signals. Alier et al. have demonstrated a 10x reduction in sample data, when level crossing sampling is performed on audio speech waveforms. A novel real-time CT-DSP reconstruction algorithm is presented, for the first time, in this paper. The technique makes use of the aliased sinc (asinc) function in order to accomplish a compact, trigonometric spline interpolation. Although the technique is not strictly ideal, corrective measures have been included to maintain accuracy. It provides 20-40 dB SINAD improvement over comparable DSP systems, depending on the application. It is applicable to low lag, real time processing while allowing a trade-off between accuracy and computational complexity.
