We present an ASIC dedicated to the CCD controller. The SPA (Signal Processing ASIC, SPA) process one CCD output channel: amplified the CCD output analog signal, correlated double sampling, converted into differential signal. This chip is highly configurable, with both readout speed and gain adjustable, in order to fulfill the various read-out requirements of astronomical CCD, such as fast readout for wide-field imaging, high-gain and low-speed readout for spectroscopy imaging, etc. At present, the chip has obtained three performance standard models available for mass production: SPA-1ch, SPA-2ch, SPA-4ch, respectively to provide 1,2,4 CCD output signal processing. The SPA chips are encapsulated by the SIP process. The size and operating temperature allow to integrate the SPA chips in-cryostat, very close to the CCD sensor. The SPA can help to form a more compact CCD control circuit. Design process and the results of performance tests of the SPA-4ch chip are reported in detail.
Some astronomical telescopes require very small and light CCD camera. To satisfy this requirement, we develop a minimal electronics system for CCD controllers based on the two ASICs: SPA-2ch and CDA which are developed by the CCD Laboratory of NAOC. Layout the circuit that most affects the CCD noise index into a circuit board with the same area as the CCD sensor, pressing closely behind the CCD sensor. This circuit can be used in a low environment with CCD sensors, minimizing the overall volume of the camera. This system can support any full-frame CCD work with no more than 16 channels. In order to verify the solution, we designed a camera test system using CCD42-40. We report here on the design and performance of the minimal electronics system in details.
In order to improve the flexibility and portability of astronomical camera software and its driver, a scheme of astronomical camera software system is designed and implemented based on the astronomical software interface standard ASCOM. In this scheme, the camera software is divided into driver layer, logic layer, interface layer and application layer, and the astronomical camera driver development based on ASCOM standard, astronomical observation function module packaging, interface function module packaging and human-computer interaction interface creation are realized in turn. This paper introduces the structural design and working principle of the software scheme, and introduces the implementation methods of the main key units in detail, and finally verifies the feasibility of this scheme through the results of test cases. This paper lays a foundation for the research on the standardized control of astronomical camera terminal and the general architecture of system software.
The Application-Specific Integrated Circuit (ASIC) development plan of the astronomical CCD control system is a special chip development project launched officially by the National Astronomical Observatory of the Chinese Academy of sciences. One of the scientific objectives: Bias and Clock Driver ASIC (CDA), has been designed and manufactured twice. The test shows the performance of CDA completely reach the design requirement. Now this chip can be mass produced at low cost. We claim the CDA is successfully developed in our laboratory. CDA provides bias voltage and clock drives for CCD working. 48 DACs which produce pulse at any amplitude can be used for most CCD controller. The combination of CDA and ASIC lead to integrated multi-CCD system or sub-mini single CCD controller. This high integrated chip make the CCD controller smaller, lower power consumption, more stable and easier to be developed.
Astronomical instrumentation, in many cases, especially the large field of view application while huge mosaic CCD or CMOS camera is needed, requires the camera electronics to be much more compact and of much smaller the size than the controller used to be. Making the major parts of CCD driving circuits into an ASIC or ASICs can greatly bring down the controller's volume, weight and power consumption and make it easier to control the crosstalk brought up by the long length of the cables that connect the CCD output ports and the signal processing electronics, and, therefore, is the most desirable approach to build the large mosaic CCD camera. A project endeavors to make two ASICs, one to achieve CCD signal processing and another to provide the clock drives and bias voltages, is introduced. The first round of design of the two ASICs has been completed and the devices have just been manufactured. Up to now the test of one of the two, the signal processing ASIC, was partially done and the linearity has reached the requirement of the design.
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