Paper
31 March 2017 RLT uniformity improvement utilizing multi-scale NIL process simulation
Sachiko Kobayashi, Ryoichi Inanami, Hirotaka Tsuda, Kazuhiro Washida, Motofumi Komori, Kyoji Yamashita, Ji-Young Im, Takuya Kono, Shimon Maeda
Author Affiliations +
Abstract
Technologies for pattern fabrication using imprint process are being developed for various devices. Nanoimpirnt lithography (NIL) is an attractive and promising candidate for its pattern fidelity toward finer device fabrication without using double patterning. To apply smaller pattern size device, layout dependent hotspots becomes a significant issue, so design for manufacturing (DFM) flow considering imprint process has to be prepared. In this paper, focused on fine resist spread, RLT (Residual Layer Thickness) uniformity improvement utilizing simulation is demonstrated and resist drop compliance check flow is proposed
© (2017) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Sachiko Kobayashi, Ryoichi Inanami, Hirotaka Tsuda, Kazuhiro Washida, Motofumi Komori, Kyoji Yamashita, Ji-Young Im, Takuya Kono, and Shimon Maeda "RLT uniformity improvement utilizing multi-scale NIL process simulation", Proc. SPIE 10144, Emerging Patterning Technologies, 101440X (31 March 2017); https://doi.org/10.1117/12.2258172
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KEYWORDS
Nanoimprint lithography

Design for manufacturing

Double patterning technology

Lithography

Photoresist processing

Optical microscopes

Artificial intelligence

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