Compensated digital readout family

David E. Ludwig; Michael Skow

doi:10.1117/12.49321

1 November 1991 Compensated digital readout family

David E. Ludwig, Michael Skow

Proceedings Volume 1541, Infrared Sensors: Detectors, Electronics, and Signal Processing; (1991) https://doi.org/10.1117/12.49321
Event: San Diego, '91, 1991, San Diego, CA, United States

Abstract

ISC has completed test on an IC which has 32 channels of amplifiers, low pass anti-aliasing filters, 13-bit analog-to-digital (A/D) converters with non-uniformity correction per channel and a digital multiplexer. The single slope class of A/D conversion is described, as are the unique variations required for incorporation of this technique for use with on-focal plane detector readout electronics. This paper describes the architecture used to implement the digital on-focal plane signal processing functions. Results from measured data on a test IC are presented for a circuit containing these functions operating at a sensor frame rate of 1000 hertz.

Citation Download Citation

David E. Ludwig and Michael Skow "Compensated digital readout family", Proc. SPIE 1541, Infrared Sensors: Detectors, Electronics, and Signal Processing, (1 November 1991); https://doi.org/10.1117/12.49321

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