In microelectronic device manufacturing, photosensitive organic insulators (POIs) are widely used during passivation steps to protect and preserve the chips from damage due to subsequent processes and from the external environment. To ensure high performance and to maintain chip quality, a well-controlled POI lithography process and corresponding defectivity monitoring are needed. In this work, we present an automated method developed by STMicroelectronics and KLA for POI defectivity and process control employing a KLA 8 Series inspection system with illumination in the visible range. The highly sensitive macro inspection tool with dedicated analysis approaches and solutions successfully enabled the detection of the principal defects of interest, the identification of defectivity root causes through automatic classification and review, and the evaluation of the layer thickness and uniformity through reflected intensity heatmaps. For several months, this protocol has been applied to the production environment, proving to be effective in detecting even small deviations from the standard process. Here, we present some promising results obtained with this strategy, highlighting the benefits in terms of rework reduction and improved equipment management.
Appropriate solutions for post-lithographic defect management and process tool control are fundamental to ensure better chip quality and yield maintenance through the reduction of wafers at risk. The increasing demand in terms of wafer production capacity and sensitivity requirements from the automotive, MEMS and Internet of Things markets is leading advanced legacy semiconductor fabs to challenge their conventional after-develop-inspection (ADI) paradigm. In this work, we present a high throughput photolithography step monitoring scheme, developed by STMicroelectronics and KLA, employing an 8 Series patterned wafer defect inspection system for wafer frontside inspection and review. Namely, we demonstrate the capacity to capture die level defects together with full wafer excursions with a significant level of sensitivity, as well as a beneficial impact on yield improvement and lithography cell control. Moreover, we propose fast and reliable methods for monitoring the pattern shift and mask check, enabling increased wafer sampling and faster rework decisions. Lastly, we show well-engineered on-tool classification solutions at inspection runtime for each defect detected, allowing for improved control with high purity and fully automatic wafer disposition. Besides inline monitoring, we also show the capacity to check process tool performance, to detect lithography excursions faster and more effectively and have a better understanding of defectivity root causes. Moreover, to ensure complete control over the full lithography process, we show after-cleaning-inspection capabilities alongside conventional ADI. In this work, we present the beneficial aspects of the adopted strategy in terms of capacity improvement and critical defect detection in the production line.
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